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@@ -53,7 +53,7 @@ static struct clocksource au1x_counter1_clocksource = {
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.read = au1x_counter1_read,
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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- .rating = 100,
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+ .rating = 1500,
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};
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static int au1x_rtcmatch2_set_next_event(unsigned long delta,
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@@ -84,7 +84,7 @@ static irqreturn_t au1x_rtcmatch2_irq(int irq, void *dev_id)
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static struct clock_event_device au1x_rtcmatch2_clockdev = {
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.name = "rtcmatch2",
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.features = CLOCK_EVT_FEAT_ONESHOT,
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- .rating = 100,
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+ .rating = 1500,
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.set_next_event = au1x_rtcmatch2_set_next_event,
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.set_mode = au1x_rtcmatch2_set_mode,
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.cpumask = cpu_all_mask,
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@@ -158,20 +158,6 @@ cntr_err:
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return -1;
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}
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-static void __init alchemy_setup_c0timer(void)
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-{
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- /*
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- * MIPS kernel assigns 'au1k_wait' to 'cpu_wait' before this
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- * function is called. Because the Alchemy counters are unusable
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- * the C0 timekeeping code is installed and use of the 'wait'
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- * instruction must be prohibited, which is done most easily by
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- * assigning NULL to cpu_wait.
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- */
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- cpu_wait = NULL;
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- r4k_clockevent_init();
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- init_r4k_clocksource();
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-}
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-
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static int alchemy_m2inttab[] __initdata = {
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AU1000_RTC_MATCH2_INT,
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AU1500_RTC_MATCH2_INT,
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@@ -186,8 +172,7 @@ void __init plat_time_init(void)
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int t;
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t = alchemy_get_cputype();
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- if (t == ALCHEMY_CPU_UNKNOWN)
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- alchemy_setup_c0timer();
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- else if (alchemy_time_init(alchemy_m2inttab[t]))
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- alchemy_setup_c0timer();
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+ if (t == ALCHEMY_CPU_UNKNOWN ||
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+ alchemy_time_init(alchemy_m2inttab[t]))
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+ cpu_wait = NULL; /* wait doesn't work with r4k timer */
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}
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