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@@ -2463,33 +2463,31 @@ static bool hsw_compute_lp_wm(struct drm_i915_private *dev_priv,
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return ilk_check_wm(level, max, result);
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}
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-static uint32_t hsw_compute_wm_pipe(struct drm_i915_private *dev_priv,
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- enum pipe pipe,
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+
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+static uint32_t hsw_compute_wm_pipe(struct drm_device *dev,
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const struct hsw_pipe_wm_parameters *params)
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{
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- uint32_t pri_val, cur_val, spr_val;
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- /* WM0 latency values stored in 0.1us units */
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- uint16_t pri_latency = dev_priv->wm.pri_latency[0];
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- uint16_t spr_latency = dev_priv->wm.spr_latency[0];
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- uint16_t cur_latency = dev_priv->wm.cur_latency[0];
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+ struct drm_i915_private *dev_priv = dev->dev_private;
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+ struct intel_wm_config config = {
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+ .num_pipes_active = 1,
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+ .sprites_enabled = params->spr.enabled,
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+ .sprites_scaled = params->spr.scaled,
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+ };
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+ struct hsw_wm_maximums max;
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+ struct intel_wm_level res;
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+
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+ if (!params->active)
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+ return 0;
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+
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+ ilk_wm_max(dev, 0, &config, INTEL_DDB_PART_1_2, &max);
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- pri_val = ilk_compute_pri_wm(params, pri_latency, false);
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- spr_val = ilk_compute_spr_wm(params, spr_latency);
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- cur_val = ilk_compute_cur_wm(params, cur_latency);
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+ ilk_compute_wm_level(dev_priv, 0, params, &res);
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- WARN(pri_val > 127,
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- "Primary WM error, mode not supported for pipe %c\n",
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- pipe_name(pipe));
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- WARN(spr_val > 127,
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- "Sprite WM error, mode not supported for pipe %c\n",
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- pipe_name(pipe));
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- WARN(cur_val > 63,
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- "Cursor WM error, mode not supported for pipe %c\n",
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- pipe_name(pipe));
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+ ilk_check_wm(0, &max, &res);
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- return (pri_val << WM0_PIPE_PLANE_SHIFT) |
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- (spr_val << WM0_PIPE_SPRITE_SHIFT) |
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- cur_val;
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+ return (res.pri_val << WM0_PIPE_PLANE_SHIFT) |
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+ (res.spr_val << WM0_PIPE_SPRITE_SHIFT) |
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+ res.cur_val;
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}
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static uint32_t
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@@ -2718,7 +2716,7 @@ static void hsw_compute_wm_results(struct drm_device *dev,
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}
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for_each_pipe(pipe)
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- results->wm_pipe[pipe] = hsw_compute_wm_pipe(dev_priv, pipe,
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+ results->wm_pipe[pipe] = hsw_compute_wm_pipe(dev,
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¶ms[pipe]);
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for_each_pipe(pipe) {
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