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@@ -611,13 +611,13 @@ static int ethoc_poll(struct napi_struct *napi, int budget)
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static int ethoc_mdio_read(struct mii_bus *bus, int phy, int reg)
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{
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- unsigned long timeout = jiffies + ETHOC_MII_TIMEOUT;
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struct ethoc *priv = bus->priv;
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+ int i;
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ethoc_write(priv, MIIADDRESS, MIIADDRESS_ADDR(phy, reg));
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ethoc_write(priv, MIICOMMAND, MIICOMMAND_READ);
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- while (time_before(jiffies, timeout)) {
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+ for (i=0; i < 5; i++) {
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u32 status = ethoc_read(priv, MIISTATUS);
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if (!(status & MIISTATUS_BUSY)) {
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u32 data = ethoc_read(priv, MIIRX_DATA);
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@@ -625,8 +625,7 @@ static int ethoc_mdio_read(struct mii_bus *bus, int phy, int reg)
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ethoc_write(priv, MIICOMMAND, 0);
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return data;
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}
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-
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- schedule();
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+ usleep_range(100,200);
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}
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return -EBUSY;
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@@ -634,22 +633,21 @@ static int ethoc_mdio_read(struct mii_bus *bus, int phy, int reg)
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static int ethoc_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val)
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{
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- unsigned long timeout = jiffies + ETHOC_MII_TIMEOUT;
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struct ethoc *priv = bus->priv;
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+ int i;
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ethoc_write(priv, MIIADDRESS, MIIADDRESS_ADDR(phy, reg));
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ethoc_write(priv, MIITX_DATA, val);
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ethoc_write(priv, MIICOMMAND, MIICOMMAND_WRITE);
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- while (time_before(jiffies, timeout)) {
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+ for (i=0; i < 5; i++) {
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u32 stat = ethoc_read(priv, MIISTATUS);
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if (!(stat & MIISTATUS_BUSY)) {
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/* reset MII command register */
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ethoc_write(priv, MIICOMMAND, 0);
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return 0;
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}
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-
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- schedule();
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+ usleep_range(100,200);
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}
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return -EBUSY;
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