|
@@ -317,7 +317,10 @@ void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
|
|
|
|
|
|
pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
|
|
|
rxq->dma_addr);
|
|
|
+ pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
|
|
|
+ rxq->rb_stts, rxq->rb_stts_dma);
|
|
|
rxq->bd = NULL;
|
|
|
+ rxq->rb_stts = NULL;
|
|
|
}
|
|
|
EXPORT_SYMBOL(iwl_rx_queue_free);
|
|
|
|
|
@@ -334,7 +337,12 @@ int iwl_rx_queue_alloc(struct iwl_priv *priv)
|
|
|
/* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
|
|
|
rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
|
|
|
if (!rxq->bd)
|
|
|
- return -ENOMEM;
|
|
|
+ goto err_bd;
|
|
|
+
|
|
|
+ rxq->rb_stts = pci_alloc_consistent(dev, sizeof(struct iwl_rb_status),
|
|
|
+ &rxq->rb_stts_dma);
|
|
|
+ if (!rxq->rb_stts)
|
|
|
+ goto err_rb;
|
|
|
|
|
|
/* Fill the rx_used queue with _all_ of the Rx buffers */
|
|
|
for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
|
|
@@ -346,6 +354,12 @@ int iwl_rx_queue_alloc(struct iwl_priv *priv)
|
|
|
rxq->free_count = 0;
|
|
|
rxq->need_update = 0;
|
|
|
return 0;
|
|
|
+
|
|
|
+err_rb:
|
|
|
+ pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
|
|
|
+ rxq->dma_addr);
|
|
|
+err_bd:
|
|
|
+ return -ENOMEM;
|
|
|
}
|
|
|
EXPORT_SYMBOL(iwl_rx_queue_alloc);
|
|
|
|
|
@@ -412,7 +426,7 @@ int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
|
|
|
|
|
|
/* Tell device where in DRAM to update its Rx status */
|
|
|
iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
|
|
|
- (priv->shared_phys + priv->rb_closed_offset) >> 4);
|
|
|
+ rxq->rb_stts_dma >> 4);
|
|
|
|
|
|
/* Enable Rx DMA
|
|
|
* FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set because of HW bug in
|