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@@ -7,8 +7,10 @@ Required properties :
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Recommended properties :
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- - compatible : Should be "fsl-i2c" for parts compatible with
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- Freescale I2C specifications.
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+ - compatible : compatibility list with 2 entries, the first should
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+ be "fsl,CHIP-i2c" where CHIP is the name of a compatible processor,
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+ e.g. mpc8313, mpc8543, mpc8544, mpc5200 or mpc5200b. The second one
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+ should be "fsl-i2c".
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- interrupts : <a b> where a is the interrupt number and b is a
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field that represents an encoding of the sense and level
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information for the interrupt. This should be encoded based on
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@@ -16,17 +18,31 @@ Recommended properties :
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controller you have.
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- interrupt-parent : the phandle for the interrupt controller that
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services interrupts for this device.
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- - dfsrr : boolean; if defined, indicates that this I2C device has
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- a digital filter sampling rate register
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- - fsl5200-clocking : boolean; if defined, indicated that this device
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- uses the FSL 5200 clocking mechanism.
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-
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-Example :
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- i2c@3000 {
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- interrupt-parent = <40000>;
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- interrupts = <1b 3>;
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- reg = <3000 18>;
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- device_type = "i2c";
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- compatible = "fsl-i2c";
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- dfsrr;
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+ - fsl,preserve-clocking : boolean; if defined, the clock settings
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+ from the bootloader are preserved (not touched).
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+ - clock-frequency : desired I2C bus clock frequency in Hz.
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+
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+Examples :
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+
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+ i2c@3d00 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
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+ cell-index = <0>;
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+ reg = <0x3d00 0x40>;
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+ interrupts = <2 15 0>;
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+ interrupt-parent = <&mpc5200_pic>;
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+ fsl,preserve-clocking;
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};
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+
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+ i2c@3100 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ cell-index = <1>;
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+ compatible = "fsl,mpc8544-i2c", "fsl-i2c";
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+ reg = <0x3100 0x100>;
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+ interrupts = <43 2>;
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+ interrupt-parent = <&mpic>;
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+ clock-frequency = <400000>;
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+ };
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+
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