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@@ -28,6 +28,9 @@
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#define FS_VF_IN_VALID 0x00000002
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#define FS_VF_IN_VALID 0x00000002
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#define FS_ENC_IN_VALID 0x00000001
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#define FS_ENC_IN_VALID 0x00000001
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+static int ipu_disable_channel(struct idmac *idmac, struct idmac_channel *ichan,
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+ bool wait_for_stop);
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+
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/*
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/*
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* There can be only one, we could allocate it dynamically, but then we'd have
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* There can be only one, we could allocate it dynamically, but then we'd have
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* to add an extra parameter to some functions, and use something as ugly as
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* to add an extra parameter to some functions, and use something as ugly as
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@@ -762,9 +765,10 @@ static void ipu_select_buffer(enum ipu_channel channel, int buffer_n)
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* function will fail if the buffer is set to ready.
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* function will fail if the buffer is set to ready.
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*/
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*/
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/* Called under spin_lock(_irqsave)(&ichan->lock) */
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/* Called under spin_lock(_irqsave)(&ichan->lock) */
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-static int ipu_update_channel_buffer(enum ipu_channel channel,
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+static int ipu_update_channel_buffer(struct idmac_channel *ichan,
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int buffer_n, dma_addr_t phyaddr)
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int buffer_n, dma_addr_t phyaddr)
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{
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{
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+ enum ipu_channel channel = ichan->dma_chan.chan_id;
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uint32_t reg;
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uint32_t reg;
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unsigned long flags;
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unsigned long flags;
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@@ -773,8 +777,8 @@ static int ipu_update_channel_buffer(enum ipu_channel channel,
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if (buffer_n == 0) {
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if (buffer_n == 0) {
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reg = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF0_RDY);
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reg = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF0_RDY);
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if (reg & (1UL << channel)) {
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if (reg & (1UL << channel)) {
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- spin_unlock_irqrestore(&ipu_data.lock, flags);
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- return -EACCES;
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+ ipu_ic_disable_task(&ipu_data, channel);
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+ ichan->status = IPU_CHANNEL_READY;
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}
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}
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/* 44.3.3.1.9 - Row Number 1 (WORD1, offset 0) */
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/* 44.3.3.1.9 - Row Number 1 (WORD1, offset 0) */
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@@ -784,8 +788,8 @@ static int ipu_update_channel_buffer(enum ipu_channel channel,
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} else {
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} else {
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reg = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF1_RDY);
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reg = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF1_RDY);
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if (reg & (1UL << channel)) {
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if (reg & (1UL << channel)) {
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- spin_unlock_irqrestore(&ipu_data.lock, flags);
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- return -EACCES;
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+ ipu_ic_disable_task(&ipu_data, channel);
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+ ichan->status = IPU_CHANNEL_READY;
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}
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}
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/* Check if double-buffering is already enabled */
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/* Check if double-buffering is already enabled */
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@@ -806,6 +810,39 @@ static int ipu_update_channel_buffer(enum ipu_channel channel,
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return 0;
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return 0;
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}
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}
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+/* Called under spin_lock_irqsave(&ichan->lock) */
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+static int ipu_submit_buffer(struct idmac_channel *ichan,
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+ struct idmac_tx_desc *desc, struct scatterlist *sg, int buf_idx)
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+{
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+ unsigned int chan_id = ichan->dma_chan.chan_id;
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+ struct device *dev = &ichan->dma_chan.dev->device;
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+ int ret;
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+
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+ if (async_tx_test_ack(&desc->txd))
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+ return -EINTR;
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+
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+ /*
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+ * On first invocation this shouldn't be necessary, the call to
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+ * ipu_init_channel_buffer() above will set addresses for us, so we
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+ * could make it conditional on status >= IPU_CHANNEL_ENABLED, but
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+ * doing it again shouldn't hurt either.
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+ */
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+ ret = ipu_update_channel_buffer(ichan, buf_idx,
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+ sg_dma_address(sg));
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+
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+ if (ret < 0) {
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+ dev_err(dev, "Updating sg %p on channel 0x%x buffer %d failed!\n",
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+ sg, chan_id, buf_idx);
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+ return ret;
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+ }
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+
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+ ipu_select_buffer(chan_id, buf_idx);
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+ dev_dbg(dev, "Updated sg %p on channel 0x%x buffer %d\n",
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+ sg, chan_id, buf_idx);
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+
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+ return 0;
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+}
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+
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/* Called under spin_lock_irqsave(&ichan->lock) */
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/* Called under spin_lock_irqsave(&ichan->lock) */
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static int ipu_submit_channel_buffers(struct idmac_channel *ichan,
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static int ipu_submit_channel_buffers(struct idmac_channel *ichan,
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struct idmac_tx_desc *desc)
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struct idmac_tx_desc *desc)
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@@ -817,20 +854,10 @@ static int ipu_submit_channel_buffers(struct idmac_channel *ichan,
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if (!ichan->sg[i]) {
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if (!ichan->sg[i]) {
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ichan->sg[i] = sg;
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ichan->sg[i] = sg;
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- /*
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- * On first invocation this shouldn't be necessary, the
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- * call to ipu_init_channel_buffer() above will set
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- * addresses for us, so we could make it conditional
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- * on status >= IPU_CHANNEL_ENABLED, but doing it again
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- * shouldn't hurt either.
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- */
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- ret = ipu_update_channel_buffer(ichan->dma_chan.chan_id, i,
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- sg_dma_address(sg));
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+ ret = ipu_submit_buffer(ichan, desc, sg, i);
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if (ret < 0)
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if (ret < 0)
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return ret;
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return ret;
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- ipu_select_buffer(ichan->dma_chan.chan_id, i);
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-
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sg = sg_next(sg);
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sg = sg_next(sg);
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}
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}
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}
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}
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@@ -844,19 +871,22 @@ static dma_cookie_t idmac_tx_submit(struct dma_async_tx_descriptor *tx)
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struct idmac_channel *ichan = to_idmac_chan(tx->chan);
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struct idmac_channel *ichan = to_idmac_chan(tx->chan);
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struct idmac *idmac = to_idmac(tx->chan->device);
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struct idmac *idmac = to_idmac(tx->chan->device);
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struct ipu *ipu = to_ipu(idmac);
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struct ipu *ipu = to_ipu(idmac);
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+ struct device *dev = &ichan->dma_chan.dev->device;
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dma_cookie_t cookie;
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dma_cookie_t cookie;
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unsigned long flags;
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unsigned long flags;
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+ int ret;
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/* Sanity check */
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/* Sanity check */
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if (!list_empty(&desc->list)) {
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if (!list_empty(&desc->list)) {
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/* The descriptor doesn't belong to client */
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/* The descriptor doesn't belong to client */
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- dev_err(&ichan->dma_chan.dev->device,
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- "Descriptor %p not prepared!\n", tx);
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+ dev_err(dev, "Descriptor %p not prepared!\n", tx);
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return -EBUSY;
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return -EBUSY;
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}
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}
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mutex_lock(&ichan->chan_mutex);
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mutex_lock(&ichan->chan_mutex);
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+ async_tx_clear_ack(tx);
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+
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if (ichan->status < IPU_CHANNEL_READY) {
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if (ichan->status < IPU_CHANNEL_READY) {
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struct idmac_video_param *video = &ichan->params.video;
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struct idmac_video_param *video = &ichan->params.video;
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/*
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/*
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@@ -880,16 +910,7 @@ static dma_cookie_t idmac_tx_submit(struct dma_async_tx_descriptor *tx)
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goto out;
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goto out;
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}
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}
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- /* ipu->lock can be taken under ichan->lock, but not v.v. */
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- spin_lock_irqsave(&ichan->lock, flags);
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-
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- /* submit_buffers() atomically verifies and fills empty sg slots */
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- cookie = ipu_submit_channel_buffers(ichan, desc);
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-
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- spin_unlock_irqrestore(&ichan->lock, flags);
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-
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- if (cookie < 0)
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- goto out;
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+ dev_dbg(dev, "Submitting sg %p\n", &desc->sg[0]);
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cookie = ichan->dma_chan.cookie;
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cookie = ichan->dma_chan.cookie;
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@@ -899,24 +920,40 @@ static dma_cookie_t idmac_tx_submit(struct dma_async_tx_descriptor *tx)
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/* from dmaengine.h: "last cookie value returned to client" */
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/* from dmaengine.h: "last cookie value returned to client" */
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ichan->dma_chan.cookie = cookie;
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ichan->dma_chan.cookie = cookie;
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tx->cookie = cookie;
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tx->cookie = cookie;
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+
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+ /* ipu->lock can be taken under ichan->lock, but not v.v. */
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spin_lock_irqsave(&ichan->lock, flags);
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spin_lock_irqsave(&ichan->lock, flags);
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+
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list_add_tail(&desc->list, &ichan->queue);
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list_add_tail(&desc->list, &ichan->queue);
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+ /* submit_buffers() atomically verifies and fills empty sg slots */
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+ ret = ipu_submit_channel_buffers(ichan, desc);
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+
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spin_unlock_irqrestore(&ichan->lock, flags);
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spin_unlock_irqrestore(&ichan->lock, flags);
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+ if (ret < 0) {
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+ cookie = ret;
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+ goto dequeue;
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+ }
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+
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if (ichan->status < IPU_CHANNEL_ENABLED) {
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if (ichan->status < IPU_CHANNEL_ENABLED) {
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- int ret = ipu_enable_channel(idmac, ichan);
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+ ret = ipu_enable_channel(idmac, ichan);
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if (ret < 0) {
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if (ret < 0) {
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cookie = ret;
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cookie = ret;
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- spin_lock_irqsave(&ichan->lock, flags);
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- list_del_init(&desc->list);
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- spin_unlock_irqrestore(&ichan->lock, flags);
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- tx->cookie = cookie;
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- ichan->dma_chan.cookie = cookie;
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+ goto dequeue;
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}
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}
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}
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}
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dump_idmac_reg(ipu);
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dump_idmac_reg(ipu);
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+dequeue:
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+ if (cookie < 0) {
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+ spin_lock_irqsave(&ichan->lock, flags);
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+ list_del_init(&desc->list);
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+ spin_unlock_irqrestore(&ichan->lock, flags);
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+ tx->cookie = cookie;
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+ ichan->dma_chan.cookie = cookie;
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+ }
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+
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out:
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out:
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mutex_unlock(&ichan->chan_mutex);
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mutex_unlock(&ichan->chan_mutex);
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@@ -1163,6 +1200,24 @@ static int ipu_disable_channel(struct idmac *idmac, struct idmac_channel *ichan,
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return 0;
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return 0;
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}
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}
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+static struct scatterlist *idmac_sg_next(struct idmac_channel *ichan,
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+ struct idmac_tx_desc **desc, struct scatterlist *sg)
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+{
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+ struct scatterlist *sgnew = sg ? sg_next(sg) : NULL;
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+
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+ if (sgnew)
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+ /* next sg-element in this list */
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+ return sgnew;
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+
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+ if ((*desc)->list.next == &ichan->queue)
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+ /* No more descriptors on the queue */
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+ return NULL;
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+
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+ /* Fetch next descriptor */
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+ *desc = list_entry((*desc)->list.next, struct idmac_tx_desc, list);
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+ return (*desc)->sg;
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+}
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+
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/*
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/*
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* We have several possibilities here:
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* We have several possibilities here:
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* current BUF next BUF
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* current BUF next BUF
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@@ -1178,23 +1233,46 @@ static int ipu_disable_channel(struct idmac *idmac, struct idmac_channel *ichan,
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static irqreturn_t idmac_interrupt(int irq, void *dev_id)
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static irqreturn_t idmac_interrupt(int irq, void *dev_id)
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{
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{
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struct idmac_channel *ichan = dev_id;
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struct idmac_channel *ichan = dev_id;
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+ struct device *dev = &ichan->dma_chan.dev->device;
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unsigned int chan_id = ichan->dma_chan.chan_id;
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unsigned int chan_id = ichan->dma_chan.chan_id;
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struct scatterlist **sg, *sgnext, *sgnew = NULL;
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struct scatterlist **sg, *sgnext, *sgnew = NULL;
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/* Next transfer descriptor */
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/* Next transfer descriptor */
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- struct idmac_tx_desc *desc = NULL, *descnew;
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+ struct idmac_tx_desc *desc, *descnew;
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dma_async_tx_callback callback;
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dma_async_tx_callback callback;
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void *callback_param;
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void *callback_param;
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bool done = false;
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bool done = false;
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- u32 ready0 = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF0_RDY),
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- ready1 = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF1_RDY),
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- curbuf = idmac_read_ipureg(&ipu_data, IPU_CHA_CUR_BUF);
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+ u32 ready0, ready1, curbuf, err;
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+ unsigned long flags;
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/* IDMAC has cleared the respective BUFx_RDY bit, we manage the buffer */
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/* IDMAC has cleared the respective BUFx_RDY bit, we manage the buffer */
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- pr_debug("IDMAC irq %d\n", irq);
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+ dev_dbg(dev, "IDMAC irq %d, buf %d\n", irq, ichan->active_buffer);
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+
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+ spin_lock_irqsave(&ipu_data.lock, flags);
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+
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+ ready0 = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF0_RDY);
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+ ready1 = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF1_RDY);
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+ curbuf = idmac_read_ipureg(&ipu_data, IPU_CHA_CUR_BUF);
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+ err = idmac_read_ipureg(&ipu_data, IPU_INT_STAT_4);
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+
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+ if (err & (1 << chan_id)) {
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+ idmac_write_ipureg(&ipu_data, 1 << chan_id, IPU_INT_STAT_4);
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+ spin_unlock_irqrestore(&ipu_data.lock, flags);
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+ /*
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+ * Doing this
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+ * ichan->sg[0] = ichan->sg[1] = NULL;
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+ * you can force channel re-enable on the next tx_submit(), but
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+ * this is dirty - think about descriptors with multiple
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+ * sg elements.
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+ */
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+ dev_warn(dev, "NFB4EOF on channel %d, ready %x, %x, cur %x\n",
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+ chan_id, ready0, ready1, curbuf);
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+ return IRQ_HANDLED;
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+ }
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+ spin_unlock_irqrestore(&ipu_data.lock, flags);
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+
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/* Other interrupts do not interfere with this channel */
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/* Other interrupts do not interfere with this channel */
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spin_lock(&ichan->lock);
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spin_lock(&ichan->lock);
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-
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if (unlikely(chan_id != IDMAC_SDC_0 && chan_id != IDMAC_SDC_1 &&
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if (unlikely(chan_id != IDMAC_SDC_0 && chan_id != IDMAC_SDC_1 &&
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((curbuf >> chan_id) & 1) == ichan->active_buffer)) {
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((curbuf >> chan_id) & 1) == ichan->active_buffer)) {
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int i = 100;
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int i = 100;
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@@ -1209,19 +1287,23 @@ static irqreturn_t idmac_interrupt(int irq, void *dev_id)
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if (!i) {
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if (!i) {
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spin_unlock(&ichan->lock);
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spin_unlock(&ichan->lock);
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- dev_dbg(ichan->dma_chan.device->dev,
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+ dev_dbg(dev,
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"IRQ on active buffer on channel %x, active "
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"IRQ on active buffer on channel %x, active "
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"%d, ready %x, %x, current %x!\n", chan_id,
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"%d, ready %x, %x, current %x!\n", chan_id,
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ichan->active_buffer, ready0, ready1, curbuf);
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ichan->active_buffer, ready0, ready1, curbuf);
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return IRQ_NONE;
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return IRQ_NONE;
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- }
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+ } else
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+ dev_dbg(dev,
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+ "Buffer deactivated on channel %x, active "
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+ "%d, ready %x, %x, current %x, rest %d!\n", chan_id,
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|
+ ichan->active_buffer, ready0, ready1, curbuf, i);
|
|
}
|
|
}
|
|
|
|
|
|
if (unlikely((ichan->active_buffer && (ready1 >> chan_id) & 1) ||
|
|
if (unlikely((ichan->active_buffer && (ready1 >> chan_id) & 1) ||
|
|
(!ichan->active_buffer && (ready0 >> chan_id) & 1)
|
|
(!ichan->active_buffer && (ready0 >> chan_id) & 1)
|
|
)) {
|
|
)) {
|
|
spin_unlock(&ichan->lock);
|
|
spin_unlock(&ichan->lock);
|
|
- dev_dbg(ichan->dma_chan.device->dev,
|
|
|
|
|
|
+ dev_dbg(dev,
|
|
"IRQ with active buffer still ready on channel %x, "
|
|
"IRQ with active buffer still ready on channel %x, "
|
|
"active %d, ready %x, %x!\n", chan_id,
|
|
"active %d, ready %x, %x!\n", chan_id,
|
|
ichan->active_buffer, ready0, ready1);
|
|
ichan->active_buffer, ready0, ready1);
|
|
@@ -1229,8 +1311,9 @@ static irqreturn_t idmac_interrupt(int irq, void *dev_id)
|
|
}
|
|
}
|
|
|
|
|
|
if (unlikely(list_empty(&ichan->queue))) {
|
|
if (unlikely(list_empty(&ichan->queue))) {
|
|
|
|
+ ichan->sg[ichan->active_buffer] = NULL;
|
|
spin_unlock(&ichan->lock);
|
|
spin_unlock(&ichan->lock);
|
|
- dev_err(ichan->dma_chan.device->dev,
|
|
|
|
|
|
+ dev_err(dev,
|
|
"IRQ without queued buffers on channel %x, active %d, "
|
|
"IRQ without queued buffers on channel %x, active %d, "
|
|
"ready %x, %x!\n", chan_id,
|
|
"ready %x, %x!\n", chan_id,
|
|
ichan->active_buffer, ready0, ready1);
|
|
ichan->active_buffer, ready0, ready1);
|
|
@@ -1245,40 +1328,44 @@ static irqreturn_t idmac_interrupt(int irq, void *dev_id)
|
|
sg = &ichan->sg[ichan->active_buffer];
|
|
sg = &ichan->sg[ichan->active_buffer];
|
|
sgnext = ichan->sg[!ichan->active_buffer];
|
|
sgnext = ichan->sg[!ichan->active_buffer];
|
|
|
|
|
|
|
|
+ if (!*sg) {
|
|
|
|
+ spin_unlock(&ichan->lock);
|
|
|
|
+ return IRQ_HANDLED;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ desc = list_entry(ichan->queue.next, struct idmac_tx_desc, list);
|
|
|
|
+ descnew = desc;
|
|
|
|
+
|
|
|
|
+ dev_dbg(dev, "IDMAC irq %d, dma 0x%08x, next dma 0x%08x, current %d, curbuf 0x%08x\n",
|
|
|
|
+ irq, sg_dma_address(*sg), sgnext ? sg_dma_address(sgnext) : 0, ichan->active_buffer, curbuf);
|
|
|
|
+
|
|
|
|
+ /* Find the descriptor of sgnext */
|
|
|
|
+ sgnew = idmac_sg_next(ichan, &descnew, *sg);
|
|
|
|
+ if (sgnext != sgnew)
|
|
|
|
+ dev_err(dev, "Submitted buffer %p, next buffer %p\n", sgnext, sgnew);
|
|
|
|
+
|
|
/*
|
|
/*
|
|
* if sgnext == NULL sg must be the last element in a scatterlist and
|
|
* if sgnext == NULL sg must be the last element in a scatterlist and
|
|
* queue must be empty
|
|
* queue must be empty
|
|
*/
|
|
*/
|
|
if (unlikely(!sgnext)) {
|
|
if (unlikely(!sgnext)) {
|
|
- if (unlikely(sg_next(*sg))) {
|
|
|
|
- dev_err(ichan->dma_chan.device->dev,
|
|
|
|
- "Broken buffer-update locking on channel %x!\n",
|
|
|
|
- chan_id);
|
|
|
|
- /* We'll let the user catch up */
|
|
|
|
|
|
+ if (!WARN_ON(sg_next(*sg)))
|
|
|
|
+ dev_dbg(dev, "Underrun on channel %x\n", chan_id);
|
|
|
|
+ ichan->sg[!ichan->active_buffer] = sgnew;
|
|
|
|
+
|
|
|
|
+ if (unlikely(sgnew)) {
|
|
|
|
+ ipu_submit_buffer(ichan, descnew, sgnew, !ichan->active_buffer);
|
|
} else {
|
|
} else {
|
|
- /* Underrun */
|
|
|
|
|
|
+ spin_lock_irqsave(&ipu_data.lock, flags);
|
|
ipu_ic_disable_task(&ipu_data, chan_id);
|
|
ipu_ic_disable_task(&ipu_data, chan_id);
|
|
- dev_dbg(ichan->dma_chan.device->dev,
|
|
|
|
- "Underrun on channel %x\n", chan_id);
|
|
|
|
|
|
+ spin_unlock_irqrestore(&ipu_data.lock, flags);
|
|
ichan->status = IPU_CHANNEL_READY;
|
|
ichan->status = IPU_CHANNEL_READY;
|
|
/* Continue to check for complete descriptor */
|
|
/* Continue to check for complete descriptor */
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
- desc = list_entry(ichan->queue.next, struct idmac_tx_desc, list);
|
|
|
|
-
|
|
|
|
- /* First calculate and submit the next sg element */
|
|
|
|
- if (likely(sgnext))
|
|
|
|
- sgnew = sg_next(sgnext);
|
|
|
|
-
|
|
|
|
- if (unlikely(!sgnew)) {
|
|
|
|
- /* Start a new scatterlist, if any queued */
|
|
|
|
- if (likely(desc->list.next != &ichan->queue)) {
|
|
|
|
- descnew = list_entry(desc->list.next,
|
|
|
|
- struct idmac_tx_desc, list);
|
|
|
|
- sgnew = &descnew->sg[0];
|
|
|
|
- }
|
|
|
|
- }
|
|
|
|
|
|
+ /* Calculate and submit the next sg element */
|
|
|
|
+ sgnew = idmac_sg_next(ichan, &descnew, sgnew);
|
|
|
|
|
|
if (unlikely(!sg_next(*sg)) || !sgnext) {
|
|
if (unlikely(!sg_next(*sg)) || !sgnext) {
|
|
/*
|
|
/*
|
|
@@ -1291,17 +1378,13 @@ static irqreturn_t idmac_interrupt(int irq, void *dev_id)
|
|
|
|
|
|
*sg = sgnew;
|
|
*sg = sgnew;
|
|
|
|
|
|
- if (likely(sgnew)) {
|
|
|
|
- int ret;
|
|
|
|
-
|
|
|
|
- ret = ipu_update_channel_buffer(chan_id, ichan->active_buffer,
|
|
|
|
- sg_dma_address(*sg));
|
|
|
|
- if (ret < 0)
|
|
|
|
- dev_err(ichan->dma_chan.device->dev,
|
|
|
|
- "Failed to update buffer on channel %x buffer %d!\n",
|
|
|
|
- chan_id, ichan->active_buffer);
|
|
|
|
- else
|
|
|
|
- ipu_select_buffer(chan_id, ichan->active_buffer);
|
|
|
|
|
|
+ if (likely(sgnew) &&
|
|
|
|
+ ipu_submit_buffer(ichan, descnew, sgnew, ichan->active_buffer) < 0) {
|
|
|
|
+ callback = desc->txd.callback;
|
|
|
|
+ callback_param = desc->txd.callback_param;
|
|
|
|
+ spin_unlock(&ichan->lock);
|
|
|
|
+ callback(callback_param);
|
|
|
|
+ spin_lock(&ichan->lock);
|
|
}
|
|
}
|
|
|
|
|
|
/* Flip the active buffer - even if update above failed */
|
|
/* Flip the active buffer - even if update above failed */
|
|
@@ -1329,13 +1412,20 @@ static void ipu_gc_tasklet(unsigned long arg)
|
|
struct idmac_channel *ichan = ipu->channel + i;
|
|
struct idmac_channel *ichan = ipu->channel + i;
|
|
struct idmac_tx_desc *desc;
|
|
struct idmac_tx_desc *desc;
|
|
unsigned long flags;
|
|
unsigned long flags;
|
|
- int j;
|
|
|
|
|
|
+ struct scatterlist *sg;
|
|
|
|
+ int j, k;
|
|
|
|
|
|
for (j = 0; j < ichan->n_tx_desc; j++) {
|
|
for (j = 0; j < ichan->n_tx_desc; j++) {
|
|
desc = ichan->desc + j;
|
|
desc = ichan->desc + j;
|
|
spin_lock_irqsave(&ichan->lock, flags);
|
|
spin_lock_irqsave(&ichan->lock, flags);
|
|
if (async_tx_test_ack(&desc->txd)) {
|
|
if (async_tx_test_ack(&desc->txd)) {
|
|
list_move(&desc->list, &ichan->free_list);
|
|
list_move(&desc->list, &ichan->free_list);
|
|
|
|
+ for_each_sg(desc->sg, sg, desc->sg_len, k) {
|
|
|
|
+ if (ichan->sg[0] == sg)
|
|
|
|
+ ichan->sg[0] = NULL;
|
|
|
|
+ else if (ichan->sg[1] == sg)
|
|
|
|
+ ichan->sg[1] = NULL;
|
|
|
|
+ }
|
|
async_tx_clear_ack(&desc->txd);
|
|
async_tx_clear_ack(&desc->txd);
|
|
}
|
|
}
|
|
spin_unlock_irqrestore(&ichan->lock, flags);
|
|
spin_unlock_irqrestore(&ichan->lock, flags);
|
|
@@ -1471,15 +1561,22 @@ static int idmac_alloc_chan_resources(struct dma_chan *chan)
|
|
goto eimap;
|
|
goto eimap;
|
|
|
|
|
|
ichan->eof_irq = ret;
|
|
ichan->eof_irq = ret;
|
|
- ret = request_irq(ichan->eof_irq, idmac_interrupt, 0,
|
|
|
|
- ichan->eof_name, ichan);
|
|
|
|
- if (ret < 0)
|
|
|
|
- goto erirq;
|
|
|
|
|
|
+
|
|
|
|
+ /*
|
|
|
|
+ * Important to first disable the channel, because maybe someone
|
|
|
|
+ * used it before us, e.g., the bootloader
|
|
|
|
+ */
|
|
|
|
+ ipu_disable_channel(idmac, ichan, true);
|
|
|
|
|
|
ret = ipu_init_channel(idmac, ichan);
|
|
ret = ipu_init_channel(idmac, ichan);
|
|
if (ret < 0)
|
|
if (ret < 0)
|
|
goto eichan;
|
|
goto eichan;
|
|
|
|
|
|
|
|
+ ret = request_irq(ichan->eof_irq, idmac_interrupt, 0,
|
|
|
|
+ ichan->eof_name, ichan);
|
|
|
|
+ if (ret < 0)
|
|
|
|
+ goto erirq;
|
|
|
|
+
|
|
ichan->status = IPU_CHANNEL_INITIALIZED;
|
|
ichan->status = IPU_CHANNEL_INITIALIZED;
|
|
|
|
|
|
dev_dbg(&ichan->dma_chan.dev->device, "Found channel 0x%x, irq %d\n",
|
|
dev_dbg(&ichan->dma_chan.dev->device, "Found channel 0x%x, irq %d\n",
|
|
@@ -1487,9 +1584,9 @@ static int idmac_alloc_chan_resources(struct dma_chan *chan)
|
|
|
|
|
|
return ret;
|
|
return ret;
|
|
|
|
|
|
-eichan:
|
|
|
|
- free_irq(ichan->eof_irq, ichan);
|
|
|
|
erirq:
|
|
erirq:
|
|
|
|
+ ipu_uninit_channel(idmac, ichan);
|
|
|
|
+eichan:
|
|
ipu_irq_unmap(ichan->dma_chan.chan_id);
|
|
ipu_irq_unmap(ichan->dma_chan.chan_id);
|
|
eimap:
|
|
eimap:
|
|
return ret;
|
|
return ret;
|