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@@ -1042,8 +1042,7 @@ EXPORT_SYMBOL_GPL(rt2800_link_stats);
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static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev)
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{
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if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) {
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- if (rt2x00_is_usb(rt2x00dev) &&
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- rt2x00_rt_rev(rt2x00dev, RT3070, REV_RT3070E))
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+ if (rt2x00_rt(rt2x00dev, RT3070))
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return 0x1c + (2 * rt2x00dev->lna_gain);
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else
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return 0x2e + rt2x00dev->lna_gain;
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@@ -1191,11 +1190,16 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
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rt2x00_set_field32(®, BKOFF_SLOT_CFG_CC_DELAY_TIME, 2);
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rt2800_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
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- if (rt2x00_is_usb(rt2x00dev) &&
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- rt2x00_rt_rev(rt2x00dev, RT3070, REV_RT3070E)) {
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+ if (rt2x00_rt(rt2x00dev, RT3070)) {
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rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
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- rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
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- rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
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+
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+ if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F)) {
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+ rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
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+ rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x0000002c);
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+ } else {
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+ rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
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+ rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
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+ }
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} else {
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rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000000);
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rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
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@@ -1535,7 +1539,15 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
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}
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rt2800_bbp_write(rt2x00dev, 70, 0x0a);
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- rt2800_bbp_write(rt2x00dev, 81, 0x37);
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+
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+ if (rt2x00_rt(rt2x00dev, RT3070)) {
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+ rt2800_bbp_write(rt2x00dev, 79, 0x13);
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+ rt2800_bbp_write(rt2x00dev, 80, 0x05);
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+ rt2800_bbp_write(rt2x00dev, 81, 0x33);
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+ } else {
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+ rt2800_bbp_write(rt2x00dev, 81, 0x37);
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+ }
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+
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rt2800_bbp_write(rt2x00dev, 82, 0x62);
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rt2800_bbp_write(rt2x00dev, 83, 0x6a);
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@@ -1548,7 +1560,12 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
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rt2800_bbp_write(rt2x00dev, 86, 0x00);
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rt2800_bbp_write(rt2x00dev, 91, 0x04);
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rt2800_bbp_write(rt2x00dev, 92, 0x00);
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- rt2800_bbp_write(rt2x00dev, 103, 0x00);
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+
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+ if (rt2x00_rt_rev_gte(rt2x00dev, RT3070, REV_RT3070F))
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+ rt2800_bbp_write(rt2x00dev, 103, 0xc0);
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+ else
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+ rt2800_bbp_write(rt2x00dev, 103, 0x00);
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+
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rt2800_bbp_write(rt2x00dev, 105, 0x05);
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rt2800_bbp_write(rt2x00dev, 106, 0x35);
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@@ -1558,13 +1575,6 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
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rt2800_bbp_write(rt2x00dev, 80, 0x08);
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}
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- if (rt2x00_is_usb(rt2x00dev) &&
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- rt2x00_rt_rev(rt2x00dev, RT3070, REV_RT3070E)) {
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- rt2800_bbp_write(rt2x00dev, 70, 0x0a);
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- rt2800_bbp_write(rt2x00dev, 84, 0x99);
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- rt2800_bbp_write(rt2x00dev, 105, 0x05);
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- }
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-
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for (i = 0; i < EEPROM_BBP_SIZE; i++) {
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rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
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@@ -1643,18 +1653,12 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
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{
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u8 rfcsr;
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u8 bbp;
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+ u32 reg;
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+ u16 eeprom;
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- if (rt2x00_is_usb(rt2x00dev) &&
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- !rt2x00_rt_rev(rt2x00dev, RT3070, REV_RT3070E))
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+ if (!rt2x00_rt(rt2x00dev, RT3070))
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return 0;
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- if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev)) {
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- if (!rt2x00_rf(rt2x00dev, RF3020) &&
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- !rt2x00_rf(rt2x00dev, RF3021) &&
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- !rt2x00_rf(rt2x00dev, RF3022))
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- return 0;
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- }
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-
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/*
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* Init RF calibration.
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*/
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@@ -1665,13 +1669,13 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
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rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 0);
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rt2800_rfcsr_write(rt2x00dev, 30, rfcsr);
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- if (rt2x00_is_usb(rt2x00dev)) {
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+ if (rt2x00_rt(rt2x00dev, RT3070)) {
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rt2800_rfcsr_write(rt2x00dev, 4, 0x40);
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rt2800_rfcsr_write(rt2x00dev, 5, 0x03);
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rt2800_rfcsr_write(rt2x00dev, 6, 0x02);
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rt2800_rfcsr_write(rt2x00dev, 7, 0x70);
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rt2800_rfcsr_write(rt2x00dev, 9, 0x0f);
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- rt2800_rfcsr_write(rt2x00dev, 10, 0x71);
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+ rt2800_rfcsr_write(rt2x00dev, 10, 0x41);
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rt2800_rfcsr_write(rt2x00dev, 11, 0x21);
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rt2800_rfcsr_write(rt2x00dev, 12, 0x7b);
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rt2800_rfcsr_write(rt2x00dev, 14, 0x90);
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@@ -1684,48 +1688,25 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
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rt2800_rfcsr_write(rt2x00dev, 21, 0xdb);
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rt2800_rfcsr_write(rt2x00dev, 24, 0x16);
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rt2800_rfcsr_write(rt2x00dev, 25, 0x01);
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- rt2800_rfcsr_write(rt2x00dev, 27, 0x03);
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rt2800_rfcsr_write(rt2x00dev, 29, 0x1f);
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- } else if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev)) {
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- rt2800_rfcsr_write(rt2x00dev, 0, 0x50);
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- rt2800_rfcsr_write(rt2x00dev, 1, 0x01);
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- rt2800_rfcsr_write(rt2x00dev, 2, 0xf7);
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- rt2800_rfcsr_write(rt2x00dev, 3, 0x75);
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- rt2800_rfcsr_write(rt2x00dev, 4, 0x40);
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- rt2800_rfcsr_write(rt2x00dev, 5, 0x03);
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- rt2800_rfcsr_write(rt2x00dev, 6, 0x02);
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- rt2800_rfcsr_write(rt2x00dev, 7, 0x50);
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- rt2800_rfcsr_write(rt2x00dev, 8, 0x39);
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- rt2800_rfcsr_write(rt2x00dev, 9, 0x0f);
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- rt2800_rfcsr_write(rt2x00dev, 10, 0x60);
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- rt2800_rfcsr_write(rt2x00dev, 11, 0x21);
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- rt2800_rfcsr_write(rt2x00dev, 12, 0x75);
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- rt2800_rfcsr_write(rt2x00dev, 13, 0x75);
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- rt2800_rfcsr_write(rt2x00dev, 14, 0x90);
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- rt2800_rfcsr_write(rt2x00dev, 15, 0x58);
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- rt2800_rfcsr_write(rt2x00dev, 16, 0xb3);
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- rt2800_rfcsr_write(rt2x00dev, 17, 0x92);
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- rt2800_rfcsr_write(rt2x00dev, 18, 0x2c);
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- rt2800_rfcsr_write(rt2x00dev, 19, 0x02);
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- rt2800_rfcsr_write(rt2x00dev, 20, 0xba);
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- rt2800_rfcsr_write(rt2x00dev, 21, 0xdb);
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- rt2800_rfcsr_write(rt2x00dev, 22, 0x00);
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- rt2800_rfcsr_write(rt2x00dev, 23, 0x31);
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- rt2800_rfcsr_write(rt2x00dev, 24, 0x08);
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- rt2800_rfcsr_write(rt2x00dev, 25, 0x01);
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- rt2800_rfcsr_write(rt2x00dev, 26, 0x25);
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- rt2800_rfcsr_write(rt2x00dev, 27, 0x23);
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- rt2800_rfcsr_write(rt2x00dev, 28, 0x13);
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- rt2800_rfcsr_write(rt2x00dev, 29, 0x83);
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+ }
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+
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+ if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F)) {
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+ rt2800_register_read(rt2x00dev, LDO_CFG0, ®);
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+ rt2x00_set_field32(®, LDO_CFG0_BGSEL, 1);
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+ rt2x00_set_field32(®, LDO_CFG0_LDO_CORE_VLEVEL, 3);
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+ rt2800_register_write(rt2x00dev, LDO_CFG0, reg);
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}
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/*
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* Set RX Filter calibration for 20MHz and 40MHz
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*/
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- rt2x00dev->calibration[0] =
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- rt2800_init_rx_filter(rt2x00dev, false, 0x07, 0x16);
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- rt2x00dev->calibration[1] =
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- rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x19);
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+ if (rt2x00_rt(rt2x00dev, RT3070)) {
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+ rt2x00dev->calibration[0] =
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+ rt2800_init_rx_filter(rt2x00dev, false, 0x07, 0x16);
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+ rt2x00dev->calibration[1] =
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+ rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x19);
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+ }
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/*
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* Set back to initial state
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@@ -1743,6 +1724,34 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
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rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0);
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rt2800_bbp_write(rt2x00dev, 4, bbp);
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+ if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F))
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+ rt2800_rfcsr_write(rt2x00dev, 27, 0x03);
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+
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+ rt2800_register_read(rt2x00dev, OPT_14_CSR, ®);
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+ rt2x00_set_field32(®, OPT_14_CSR_BIT0, 1);
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+ rt2800_register_write(rt2x00dev, OPT_14_CSR, reg);
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+
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+ rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr);
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+ rt2x00_set_field8(&rfcsr, RFCSR17_TX_LO1_EN, 0);
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+ rt2x00_eeprom_read(rt2x00dev, EEPROM_TXMIXER_GAIN_BG, &eeprom);
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+ if (rt2x00_get_field16(eeprom, EEPROM_TXMIXER_GAIN_BG_VAL) >= 1)
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+ rt2x00_set_field8(&rfcsr, RFCSR17_TXMIXER_GAIN,
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+ rt2x00_get_field16(eeprom,
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+ EEPROM_TXMIXER_GAIN_BG_VAL));
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+ rt2800_rfcsr_write(rt2x00dev, 17, rfcsr);
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+
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+ if (rt2x00_rt(rt2x00dev, RT3070)) {
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+ rt2800_rfcsr_read(rt2x00dev, 27, &rfcsr);
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+ if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F))
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+ rt2x00_set_field8(&rfcsr, RFCSR27_R1, 3);
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+ else
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+ rt2x00_set_field8(&rfcsr, RFCSR27_R1, 0);
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+ rt2x00_set_field8(&rfcsr, RFCSR27_R2, 0);
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+ rt2x00_set_field8(&rfcsr, RFCSR27_R3, 0);
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+ rt2x00_set_field8(&rfcsr, RFCSR27_R4, 0);
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+ rt2800_rfcsr_write(rt2x00dev, 27, rfcsr);
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+ }
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+
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return 0;
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}
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EXPORT_SYMBOL_GPL(rt2800_init_rfcsr);
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