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@@ -974,9 +974,7 @@ static int iwl3945_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
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}
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iwl_write_direct32(priv, FH39_RCSR_RBD_BASE(0), rxq->dma_addr);
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- iwl_write_direct32(priv, FH39_RCSR_RPTR_ADDR(0),
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- priv->shared_phys +
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- offsetof(struct iwl3945_shared, rx_read_ptr[0]));
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+ iwl_write_direct32(priv, FH39_RCSR_RPTR_ADDR(0), rxq->rb_stts_dma);
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iwl_write_direct32(priv, FH39_RCSR_WPTR(0), 0);
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iwl_write_direct32(priv, FH39_RCSR_CONFIG(0),
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FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
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@@ -2377,13 +2375,6 @@ int iwl3945_hw_tx_queue_init(struct iwl_priv *priv, struct iwl3945_tx_queue *txq
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return 0;
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}
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-int iwl3945_hw_get_rx_read(struct iwl_priv *priv)
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-{
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- struct iwl3945_shared *shared_data = priv->shared_virt;
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-
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- return le32_to_cpu(shared_data->rx_read_ptr[0]);
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-}
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-
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/**
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* iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
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*/
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