|
@@ -93,10 +93,8 @@ static s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw,
|
|
**/
|
|
**/
|
|
static s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw)
|
|
static s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw)
|
|
{
|
|
{
|
|
- ixgbe_link_speed link_speed;
|
|
|
|
s32 status;
|
|
s32 status;
|
|
u32 ctrl, i;
|
|
u32 ctrl, i;
|
|
- bool link_up = false;
|
|
|
|
|
|
|
|
/* Call adapter stop to disable tx/rx and clear interrupts */
|
|
/* Call adapter stop to disable tx/rx and clear interrupts */
|
|
status = hw->mac.ops.stop_adapter(hw);
|
|
status = hw->mac.ops.stop_adapter(hw);
|
|
@@ -107,19 +105,7 @@ static s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw)
|
|
ixgbe_clear_tx_pending(hw);
|
|
ixgbe_clear_tx_pending(hw);
|
|
|
|
|
|
mac_reset_top:
|
|
mac_reset_top:
|
|
- /*
|
|
|
|
- * Issue global reset to the MAC. Needs to be SW reset if link is up.
|
|
|
|
- * If link reset is used when link is up, it might reset the PHY when
|
|
|
|
- * mng is using it. If link is down or the flag to force full link
|
|
|
|
- * reset is set, then perform link reset.
|
|
|
|
- */
|
|
|
|
- ctrl = IXGBE_CTRL_LNK_RST;
|
|
|
|
- if (!hw->force_full_reset) {
|
|
|
|
- hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
|
|
|
|
- if (link_up)
|
|
|
|
- ctrl = IXGBE_CTRL_RST;
|
|
|
|
- }
|
|
|
|
-
|
|
|
|
|
|
+ ctrl = IXGBE_CTRL_RST;
|
|
ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL);
|
|
ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL);
|
|
IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
|
|
IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
|
|
IXGBE_WRITE_FLUSH(hw);
|
|
IXGBE_WRITE_FLUSH(hw);
|
|
@@ -136,8 +122,7 @@ mac_reset_top:
|
|
status = IXGBE_ERR_RESET_FAILED;
|
|
status = IXGBE_ERR_RESET_FAILED;
|
|
hw_dbg(hw, "Reset polling failed to complete.\n");
|
|
hw_dbg(hw, "Reset polling failed to complete.\n");
|
|
}
|
|
}
|
|
-
|
|
|
|
- msleep(50);
|
|
|
|
|
|
+ msleep(100);
|
|
|
|
|
|
/*
|
|
/*
|
|
* Double resets are required for recovery from certain error
|
|
* Double resets are required for recovery from certain error
|