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@@ -79,36 +79,6 @@ static int dbg = 1;
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}
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}
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#endif
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#endif
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-#define PT64_PT_BITS 9
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-#define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
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-#define PT32_PT_BITS 10
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-#define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
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-
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-#define PT_WRITABLE_SHIFT 1
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-
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-#define PT_PRESENT_MASK (1ULL << 0)
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-#define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
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-#define PT_USER_MASK (1ULL << 2)
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-#define PT_PWT_MASK (1ULL << 3)
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-#define PT_PCD_MASK (1ULL << 4)
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-#define PT_ACCESSED_MASK (1ULL << 5)
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-#define PT_DIRTY_MASK (1ULL << 6)
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-#define PT_PAGE_SIZE_MASK (1ULL << 7)
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-#define PT_PAT_MASK (1ULL << 7)
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-#define PT_GLOBAL_MASK (1ULL << 8)
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-#define PT64_NX_SHIFT 63
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-#define PT64_NX_MASK (1ULL << PT64_NX_SHIFT)
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-
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-#define PT_PAT_SHIFT 7
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-#define PT_DIR_PAT_SHIFT 12
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-#define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
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-
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-#define PT32_DIR_PSE36_SIZE 4
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-#define PT32_DIR_PSE36_SHIFT 13
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-#define PT32_DIR_PSE36_MASK \
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- (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
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-
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-
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#define PT_FIRST_AVAIL_BITS_SHIFT 9
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#define PT_FIRST_AVAIL_BITS_SHIFT 9
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#define PT64_SECOND_AVAIL_BITS_SHIFT 52
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#define PT64_SECOND_AVAIL_BITS_SHIFT 52
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@@ -154,10 +124,6 @@ static int dbg = 1;
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#define PFERR_USER_MASK (1U << 2)
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#define PFERR_USER_MASK (1U << 2)
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#define PFERR_FETCH_MASK (1U << 4)
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#define PFERR_FETCH_MASK (1U << 4)
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-#define PT64_ROOT_LEVEL 4
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-#define PT32_ROOT_LEVEL 2
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-#define PT32E_ROOT_LEVEL 3
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-
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#define PT_DIRECTORY_LEVEL 2
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#define PT_DIRECTORY_LEVEL 2
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#define PT_PAGE_TABLE_LEVEL 1
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#define PT_PAGE_TABLE_LEVEL 1
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