|
@@ -909,26 +909,6 @@ static struct clksrc_clk clksrcs[] = {
|
|
|
.sources = &clkset_group2,
|
|
|
.reg_src = { .reg = S5P_CLK_SRC1, .shift = 24, .size = 4 },
|
|
|
.reg_div = { .reg = S5P_CLK_DIV1, .shift = 28, .size = 4 },
|
|
|
- }, {
|
|
|
- .clk = {
|
|
|
- .name = "sclk_spi",
|
|
|
- .devname = "s3c64xx-spi.0",
|
|
|
- .enable = s5pv210_clk_mask0_ctrl,
|
|
|
- .ctrlbit = (1 << 16),
|
|
|
- },
|
|
|
- .sources = &clkset_group2,
|
|
|
- .reg_src = { .reg = S5P_CLK_SRC5, .shift = 0, .size = 4 },
|
|
|
- .reg_div = { .reg = S5P_CLK_DIV5, .shift = 0, .size = 4 },
|
|
|
- }, {
|
|
|
- .clk = {
|
|
|
- .name = "sclk_spi",
|
|
|
- .devname = "s3c64xx-spi.1",
|
|
|
- .enable = s5pv210_clk_mask0_ctrl,
|
|
|
- .ctrlbit = (1 << 17),
|
|
|
- },
|
|
|
- .sources = &clkset_group2,
|
|
|
- .reg_src = { .reg = S5P_CLK_SRC5, .shift = 4, .size = 4 },
|
|
|
- .reg_div = { .reg = S5P_CLK_DIV5, .shift = 4, .size = 4 },
|
|
|
}, {
|
|
|
.clk = {
|
|
|
.name = "sclk_pwi",
|
|
@@ -1046,6 +1026,31 @@ static struct clksrc_clk clk_sclk_mmc3 = {
|
|
|
.reg_div = { .reg = S5P_CLK_DIV4, .shift = 12, .size = 4 },
|
|
|
};
|
|
|
|
|
|
+static struct clksrc_clk clk_sclk_spi0 = {
|
|
|
+ .clk = {
|
|
|
+ .name = "sclk_spi",
|
|
|
+ .devname = "s3c64xx-spi.0",
|
|
|
+ .enable = s5pv210_clk_mask0_ctrl,
|
|
|
+ .ctrlbit = (1 << 16),
|
|
|
+ },
|
|
|
+ .sources = &clkset_group2,
|
|
|
+ .reg_src = { .reg = S5P_CLK_SRC5, .shift = 0, .size = 4 },
|
|
|
+ .reg_div = { .reg = S5P_CLK_DIV5, .shift = 0, .size = 4 },
|
|
|
+ };
|
|
|
+
|
|
|
+static struct clksrc_clk clk_sclk_spi1 = {
|
|
|
+ .clk = {
|
|
|
+ .name = "sclk_spi",
|
|
|
+ .devname = "s3c64xx-spi.1",
|
|
|
+ .enable = s5pv210_clk_mask0_ctrl,
|
|
|
+ .ctrlbit = (1 << 17),
|
|
|
+ },
|
|
|
+ .sources = &clkset_group2,
|
|
|
+ .reg_src = { .reg = S5P_CLK_SRC5, .shift = 4, .size = 4 },
|
|
|
+ .reg_div = { .reg = S5P_CLK_DIV5, .shift = 4, .size = 4 },
|
|
|
+ };
|
|
|
+
|
|
|
+
|
|
|
static struct clksrc_clk *clksrc_cdev[] = {
|
|
|
&clk_sclk_uart0,
|
|
|
&clk_sclk_uart1,
|
|
@@ -1055,6 +1060,8 @@ static struct clksrc_clk *clksrc_cdev[] = {
|
|
|
&clk_sclk_mmc1,
|
|
|
&clk_sclk_mmc2,
|
|
|
&clk_sclk_mmc3,
|
|
|
+ &clk_sclk_spi0,
|
|
|
+ &clk_sclk_spi1,
|
|
|
};
|
|
|
|
|
|
static struct clk *clk_cdev[] = {
|
|
@@ -1317,6 +1324,9 @@ static struct clk_lookup s5pv210_clk_lookup[] = {
|
|
|
CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
|
|
|
CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
|
|
|
CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk),
|
|
|
+ CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
|
|
|
+ CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
|
|
|
+ CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
|
|
|
};
|
|
|
|
|
|
void __init s5pv210_register_clocks(void)
|