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@@ -17,12 +17,15 @@
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#define MMCONFIG_APER_SIZE (256*1024*1024)
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#define MMCONFIG_APER_SIZE (256*1024*1024)
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+/* Assume systems with more busses have correct MCFG */
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+#define MAX_CHECK_BUS 16
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+
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#define mmcfg_virt_addr ((void __iomem *) fix_to_virt(FIX_PCIE_MCFG))
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#define mmcfg_virt_addr ((void __iomem *) fix_to_virt(FIX_PCIE_MCFG))
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/* The base address of the last MMCONFIG device accessed */
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/* The base address of the last MMCONFIG device accessed */
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static u32 mmcfg_last_accessed_device;
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static u32 mmcfg_last_accessed_device;
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-static DECLARE_BITMAP(fallback_slots, 32);
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+static DECLARE_BITMAP(fallback_slots, MAX_CHECK_BUS*32);
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/*
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/*
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* Functions for accessing PCI configuration space with MMCONFIG accesses
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* Functions for accessing PCI configuration space with MMCONFIG accesses
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@@ -32,8 +35,8 @@ static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn)
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int cfg_num = -1;
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int cfg_num = -1;
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struct acpi_table_mcfg_config *cfg;
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struct acpi_table_mcfg_config *cfg;
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- if (seg == 0 && bus == 0 &&
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- test_bit(PCI_SLOT(devfn), fallback_slots))
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+ if (seg == 0 && bus < MAX_CHECK_BUS &&
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+ test_bit(PCI_SLOT(devfn) + 32*bus, fallback_slots))
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return 0;
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return 0;
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while (1) {
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while (1) {
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@@ -149,29 +152,34 @@ static struct pci_raw_ops pci_mmcfg = {
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Normally this can be expressed in the MCFG by not listing them
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Normally this can be expressed in the MCFG by not listing them
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and assigning suitable _SEGs, but this isn't implemented in some BIOS.
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and assigning suitable _SEGs, but this isn't implemented in some BIOS.
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Instead try to discover all devices on bus 0 that are unreachable using MM
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Instead try to discover all devices on bus 0 that are unreachable using MM
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- and fallback for them.
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- We only do this for bus 0/seg 0 */
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+ and fallback for them. */
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static __init void unreachable_devices(void)
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static __init void unreachable_devices(void)
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{
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{
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- int i;
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+ int i, k;
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unsigned long flags;
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unsigned long flags;
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- for (i = 0; i < 32; i++) {
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- u32 val1;
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- u32 addr;
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-
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- pci_conf1_read(0, 0, PCI_DEVFN(i, 0), 0, 4, &val1);
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- if (val1 == 0xffffffff)
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- continue;
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-
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- /* Locking probably not needed, but safer */
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- spin_lock_irqsave(&pci_config_lock, flags);
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- addr = get_base_addr(0, 0, PCI_DEVFN(i, 0));
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- if (addr != 0)
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- pci_exp_set_dev_base(addr, 0, PCI_DEVFN(i, 0));
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- if (addr == 0 || readl((u32 __iomem *)mmcfg_virt_addr) != val1)
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- set_bit(i, fallback_slots);
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- spin_unlock_irqrestore(&pci_config_lock, flags);
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+ for (k = 0; k < MAX_CHECK_BUS; k++) {
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+ for (i = 0; i < 32; i++) {
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+ u32 val1;
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+ u32 addr;
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+
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+ pci_conf1_read(0, k, PCI_DEVFN(i, 0), 0, 4, &val1);
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+ if (val1 == 0xffffffff)
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+ continue;
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+
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+ /* Locking probably not needed, but safer */
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+ spin_lock_irqsave(&pci_config_lock, flags);
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+ addr = get_base_addr(0, k, PCI_DEVFN(i, 0));
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+ if (addr != 0)
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+ pci_exp_set_dev_base(addr, k, PCI_DEVFN(i, 0));
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+ if (addr == 0 ||
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+ readl((u32 __iomem *)mmcfg_virt_addr) != val1) {
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+ set_bit(i, fallback_slots);
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+ printk(KERN_NOTICE
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+ "PCI: No mmconfig possible on %x:%x\n", k, i);
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+ }
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+ spin_unlock_irqrestore(&pci_config_lock, flags);
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+ }
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}
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}
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}
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}
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