Signed-off-by: Jeff Garzik <jeff@garzik.org>
@@ -46,7 +46,7 @@
#include <linux/libata.h>
#define DRV_NAME "ahci"
-#define DRV_VERSION "2.1"
+#define DRV_VERSION "2.2"
enum {
@@ -26,7 +26,7 @@
#define DRV_NAME "ata_generic"
-#define DRV_VERSION "0.2.11"
+#define DRV_VERSION "0.2.12"
/*
* A generic parallel ATA driver using libata
@@ -59,7 +59,7 @@
#include "libata.h"
-#define DRV_VERSION "2.20" /* must be exactly four chars */
+#define DRV_VERSION "2.21" /* must be exactly four chars */
/* debounce timing parameters in msecs { interval, duration, timeout } */
@@ -28,7 +28,7 @@
#include <linux/ata.h>
#define DRV_NAME "pata_artop"
-#define DRV_VERSION "0.4.2"
+#define DRV_VERSION "0.4.3"
* The ARTOP has 33 Mhz and "over clocked" timing tables. Until we
@@ -31,7 +31,7 @@
#define DRV_NAME "pata_cmd64x"
-#define DRV_VERSION "0.2.2"
+#define DRV_VERSION "0.2.3"
* CMD64x specific registers definition.
@@ -41,7 +41,7 @@
#define DRV_NAME "pata_cs5520"
-#define DRV_VERSION "0.6.4"
+#define DRV_VERSION "0.6.5"
struct pio_clocks
{
@@ -35,7 +35,7 @@
#include <linux/dmi.h>
#define DRV_NAME "pata_cs5530"
-#define DRV_VERSION "0.7.2"
+#define DRV_VERSION "0.7.3"
static void __iomem *cs5530_port_base(struct ata_port *ap)
@@ -39,7 +39,7 @@
#include <asm/msr.h>
#define DRV_NAME "cs5535"
* The Geode (Aka Athlon GX now) uses an internal MSR based
@@ -18,7 +18,7 @@
#define DRV_NAME "pata_cypress"
-#define DRV_VERSION "0.1.4"
+#define DRV_VERSION "0.1.5"
/* here are the offset definitions for the registers */
@@ -23,7 +23,7 @@
#define DRV_NAME "pata_hpt3x3"
/**
* hpt3x3_set_piomode - PIO setup
@@ -17,7 +17,7 @@
#define DRV_NAME "pata_isapnp"
-#define DRV_VERSION "0.2.0"
+#define DRV_VERSION "0.2.1"
static struct scsi_host_template isapnp_sht = {
.module = THIS_MODULE,
@@ -19,7 +19,7 @@
#define DRV_NAME "pata_it8213"
-#define DRV_VERSION "0.0.2"
+#define DRV_VERSION "0.0.3"
* it8213_pre_reset - check for 40/80 pin
#include <scsi/scsi_host.h>
#define DRV_NAME "pata_ixp4xx_cf"
-#define DRV_VERSION "0.1.2"
+#define DRV_VERSION "0.1.3"
static int ixp4xx_set_mode(struct ata_port *ap, struct ata_device **error)
#define DRV_NAME "pata_jmicron"
typedef enum {
PORT_PATA0 = 0,
@@ -64,7 +64,7 @@
#include <linux/platform_device.h>
#define DRV_NAME "pata_legacy"
-#define DRV_VERSION "0.5.4"
+#define DRV_VERSION "0.5.5"
#define NR_HOST 6
@@ -22,7 +22,7 @@
#include <linux/pata_platform.h>
#define DRV_NAME "pata_platform"
+#define DRV_VERSION "1.0"
static int pio_mask = 1;
#define DRV_NAME "pata_qdi"
-#define DRV_VERSION "0.3.0"
+#define DRV_VERSION "0.3.1"
#define NR_HOST 4 /* Two 6580s */
@@ -21,7 +21,7 @@
#define DRV_NAME "pata_rz1000"
-#define DRV_VERSION "0.2.3"
+#define DRV_VERSION "0.2.4"
@@ -40,7 +40,7 @@
#define DRV_NAME "sc1200"
-#define DRV_VERSION "0.2.4"
+#define DRV_VERSION "0.2.5"
#define SC1200_REV_A 0x00
#define SC1200_REV_B1 0x01
@@ -43,7 +43,7 @@
#define DRV_NAME "pata_scc"
-#define DRV_VERSION "0.1"
+#define DRV_VERSION "0.2"
#define PCI_DEVICE_ID_TOSHIBA_SCC_ATA 0x01b4
#define DRV_NAME "pata_serverworks"
-#define DRV_VERSION "0.4.0"
+#define DRV_VERSION "0.4.1"
#define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5 (A2.0) */
#define SVWKS_CSB6_REVISION 0xa0 /* min PCI_REVISION_ID for UDMA4 (A1.0) */
#define DRV_NAME "pata_sl82c105"
@@ -16,7 +16,7 @@
#define DRV_NAME "pata_winbond"
#define NR_HOST 4 /* Two winbond controllers, two channels each */
@@ -44,7 +44,7 @@
#define DRV_NAME "pdc_adma"
-#define DRV_VERSION "0.05"
+#define DRV_VERSION "0.06"
/* macro to calculate base address for ATA regs */
#define ADMA_ATA_REGS(base,port_no) ((base) + ((port_no) * 0x40))
#include <scsi/scsi_device.h>
#define DRV_NAME "sata_inic162x"
MMIO_BAR = 5,
#define DRV_NAME "sata_mv"
-#define DRV_VERSION "0.8"
+#define DRV_VERSION "0.81"
/* BAR's are enumerated in terms of pci_resource_start() terms */
@@ -49,7 +49,7 @@
#define DRV_NAME "sata_nv"
-#define DRV_VERSION "3.3"
+#define DRV_VERSION "3.4"
#define NV_ADMA_DMA_BOUNDARY 0xffffffffUL
#define DRV_NAME "sata_qstor"
-#define DRV_VERSION "0.07"
+#define DRV_VERSION "0.08"
QS_MMIO_BAR = 4,
@@ -30,7 +30,7 @@
#define DRV_NAME "sata_sil24"
+#define DRV_VERSION "0.9"
* Port request block (PRB) 32 bytes
#include "sis.h"
#define DRV_NAME "sata_sis"
-#define DRV_VERSION "0.7"
+#define DRV_VERSION "0.8"
sis_180 = 0,
@@ -53,7 +53,7 @@
#endif /* CONFIG_PPC_OF */
#define DRV_NAME "sata_svw"
/* ap->flags bits */
#include "sata_promise.h"
#define DRV_NAME "sata_sx4"
-#define DRV_VERSION "0.10"
+#define DRV_VERSION "0.11"
@@ -36,7 +36,7 @@
#define DRV_NAME "sata_uli"
-#define DRV_VERSION "1.1"
+#define DRV_VERSION "1.2"
uli_5289 = 0,
#define DRV_NAME "sata_via"
enum board_ids_enum {
vt6420,
@@ -47,7 +47,7 @@
#define DRV_NAME "sata_vsc"
VSC_MMIO_BAR = 0,