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@@ -17,6 +17,8 @@
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#include <linux/bitops.h>
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#include <linux/smp.h>
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#include <linux/nmi.h>
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+#include <linux/kprobes.h>
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+
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#include <asm/apic.h>
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#include <asm/intel_arch_perfmon.h>
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@@ -336,7 +338,8 @@ static void single_msr_unreserve(void)
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release_perfctr_nmi(wd_ops->perfctr);
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}
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-static void single_msr_rearm(struct nmi_watchdog_ctlblk *wd, unsigned nmi_hz)
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+static void __kprobes
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+single_msr_rearm(struct nmi_watchdog_ctlblk *wd, unsigned nmi_hz)
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{
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/* start the cycle over again */
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write_watchdog_counter(wd->perfctr_msr, NULL, nmi_hz);
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@@ -401,7 +404,7 @@ static int setup_p6_watchdog(unsigned nmi_hz)
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return 1;
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}
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-static void p6_rearm(struct nmi_watchdog_ctlblk *wd, unsigned nmi_hz)
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+static void __kprobes p6_rearm(struct nmi_watchdog_ctlblk *wd, unsigned nmi_hz)
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{
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/*
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* P6 based Pentium M need to re-unmask
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@@ -605,7 +608,7 @@ static void p4_unreserve(void)
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release_perfctr_nmi(MSR_P4_IQ_PERFCTR0);
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}
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-static void p4_rearm(struct nmi_watchdog_ctlblk *wd, unsigned nmi_hz)
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+static void __kprobes p4_rearm(struct nmi_watchdog_ctlblk *wd, unsigned nmi_hz)
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{
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unsigned dummy;
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/*
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@@ -784,7 +787,7 @@ unsigned lapic_adjust_nmi_hz(unsigned hz)
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return hz;
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}
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-int lapic_wd_event(unsigned nmi_hz)
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+int __kprobes lapic_wd_event(unsigned nmi_hz)
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{
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struct nmi_watchdog_ctlblk *wd = &__get_cpu_var(nmi_watchdog_ctlblk);
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u64 ctr;
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