|
@@ -17,13 +17,13 @@
|
|
|
#include <linux/kdev_t.h>
|
|
|
#include <linux/delay.h>
|
|
|
#include <linux/seq_file.h>
|
|
|
+#include <linux/of_platform.h>
|
|
|
|
|
|
#include <asm/system.h>
|
|
|
#include <asm/time.h>
|
|
|
#include <asm/machdep.h>
|
|
|
#include <asm/pci-bridge.h>
|
|
|
#include <asm/mpc85xx.h>
|
|
|
-#include <asm/prom.h>
|
|
|
#include <asm/mpic.h>
|
|
|
#include <mm/mmu_decl.h>
|
|
|
#include <asm/udbg.h>
|
|
@@ -32,10 +32,8 @@
|
|
|
#include <sysdev/fsl_pci.h>
|
|
|
|
|
|
#ifdef CONFIG_CPM2
|
|
|
-#include <linux/fs_enet_pd.h>
|
|
|
#include <asm/cpm2.h>
|
|
|
#include <sysdev/cpm2_pic.h>
|
|
|
-#include <asm/fs_pd.h>
|
|
|
#endif
|
|
|
|
|
|
#ifdef CONFIG_PCI
|
|
@@ -95,10 +93,10 @@ static void __init mpc85xx_ads_pic_init(void)
|
|
|
|
|
|
#ifdef CONFIG_CPM2
|
|
|
/* Setup CPM2 PIC */
|
|
|
- np = of_find_node_by_type(NULL, "cpm-pic");
|
|
|
+ np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
|
|
|
if (np == NULL) {
|
|
|
- printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
|
|
|
- return;
|
|
|
+ printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
|
|
|
+ return;
|
|
|
}
|
|
|
irq = irq_of_parse_and_map(np, 0);
|
|
|
|
|
@@ -111,81 +109,75 @@ static void __init mpc85xx_ads_pic_init(void)
|
|
|
* Setup the architecture
|
|
|
*/
|
|
|
#ifdef CONFIG_CPM2
|
|
|
-void init_fcc_ioports(struct fs_platform_info *fpi)
|
|
|
+struct cpm_pin {
|
|
|
+ int port, pin, flags;
|
|
|
+};
|
|
|
+
|
|
|
+static struct cpm_pin mpc8560_ads_pins[] = {
|
|
|
+ /* SCC1 */
|
|
|
+ {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
+ {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
|
|
|
+ {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
+
|
|
|
+ /* SCC2 */
|
|
|
+ {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
+ {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
+ {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
+
|
|
|
+ /* FCC2 */
|
|
|
+ {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
|
|
|
+ {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
+ {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK14 */
|
|
|
+ {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK13 */
|
|
|
+
|
|
|
+ /* FCC3 */
|
|
|
+ {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 7, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 14, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
+ {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
+ {2, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK16 */
|
|
|
+ {2, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK15 */
|
|
|
+};
|
|
|
+
|
|
|
+static void __init init_ioports(void)
|
|
|
{
|
|
|
- struct io_port *io = cpm2_map(im_ioport);
|
|
|
- int fcc_no = fs_get_fcc_index(fpi->fs_no);
|
|
|
- int target;
|
|
|
- u32 tempval;
|
|
|
-
|
|
|
- switch(fcc_no) {
|
|
|
- case 1:
|
|
|
- tempval = in_be32(&io->iop_pdirb);
|
|
|
- tempval &= ~PB2_DIRB0;
|
|
|
- tempval |= PB2_DIRB1;
|
|
|
- out_be32(&io->iop_pdirb, tempval);
|
|
|
-
|
|
|
- tempval = in_be32(&io->iop_psorb);
|
|
|
- tempval &= ~PB2_PSORB0;
|
|
|
- tempval |= PB2_PSORB1;
|
|
|
- out_be32(&io->iop_psorb, tempval);
|
|
|
-
|
|
|
- tempval = in_be32(&io->iop_pparb);
|
|
|
- tempval |= (PB2_DIRB0 | PB2_DIRB1);
|
|
|
- out_be32(&io->iop_pparb, tempval);
|
|
|
-
|
|
|
- target = CPM_CLK_FCC2;
|
|
|
- break;
|
|
|
- case 2:
|
|
|
- tempval = in_be32(&io->iop_pdirb);
|
|
|
- tempval &= ~PB3_DIRB0;
|
|
|
- tempval |= PB3_DIRB1;
|
|
|
- out_be32(&io->iop_pdirb, tempval);
|
|
|
-
|
|
|
- tempval = in_be32(&io->iop_psorb);
|
|
|
- tempval &= ~PB3_PSORB0;
|
|
|
- tempval |= PB3_PSORB1;
|
|
|
- out_be32(&io->iop_psorb, tempval);
|
|
|
-
|
|
|
- tempval = in_be32(&io->iop_pparb);
|
|
|
- tempval |= (PB3_DIRB0 | PB3_DIRB1);
|
|
|
- out_be32(&io->iop_pparb, tempval);
|
|
|
-
|
|
|
- tempval = in_be32(&io->iop_pdirc);
|
|
|
- tempval |= PC3_DIRC1;
|
|
|
- out_be32(&io->iop_pdirc, tempval);
|
|
|
-
|
|
|
- tempval = in_be32(&io->iop_pparc);
|
|
|
- tempval |= PC3_DIRC1;
|
|
|
- out_be32(&io->iop_pparc, tempval);
|
|
|
-
|
|
|
- target = CPM_CLK_FCC3;
|
|
|
- break;
|
|
|
- default:
|
|
|
- printk(KERN_ERR "init_fcc_ioports: invalid FCC number\n");
|
|
|
- return;
|
|
|
+ int i;
|
|
|
+
|
|
|
+ for (i = 0; i < ARRAY_SIZE(mpc8560_ads_pins); i++) {
|
|
|
+ struct cpm_pin *pin = &mpc8560_ads_pins[i];
|
|
|
+ cpm2_set_pin(pin->port, pin->pin, pin->flags);
|
|
|
}
|
|
|
|
|
|
- /* Port C has clocks...... */
|
|
|
- tempval = in_be32(&io->iop_psorc);
|
|
|
- tempval &= ~(PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8));
|
|
|
- out_be32(&io->iop_psorc, tempval);
|
|
|
-
|
|
|
- tempval = in_be32(&io->iop_pdirc);
|
|
|
- tempval &= ~(PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8));
|
|
|
- out_be32(&io->iop_pdirc, tempval);
|
|
|
- tempval = in_be32(&io->iop_pparc);
|
|
|
- tempval |= (PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8));
|
|
|
- out_be32(&io->iop_pparc, tempval);
|
|
|
-
|
|
|
- cpm2_unmap(io);
|
|
|
-
|
|
|
- /* Configure Serial Interface clock routing.
|
|
|
- * First, clear FCC bits to zero,
|
|
|
- * then set the ones we want.
|
|
|
- */
|
|
|
- cpm2_clk_setup(target, fpi->clk_rx, CPM_CLK_RX);
|
|
|
- cpm2_clk_setup(target, fpi->clk_tx, CPM_CLK_TX);
|
|
|
+ cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
|
|
|
+ cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
|
|
|
+ cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
|
|
|
+ cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
|
|
|
+ cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
|
|
|
+ cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
|
|
|
+ cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX);
|
|
|
+ cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX);
|
|
|
}
|
|
|
#endif
|
|
|
|
|
@@ -200,6 +192,7 @@ static void __init mpc85xx_ads_setup_arch(void)
|
|
|
|
|
|
#ifdef CONFIG_CPM2
|
|
|
cpm2_reset();
|
|
|
+ init_ioports();
|
|
|
#endif
|
|
|
|
|
|
#ifdef CONFIG_PCI
|
|
@@ -231,6 +224,24 @@ static void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
|
|
|
seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
|
|
|
}
|
|
|
|
|
|
+static struct of_device_id __initdata of_bus_ids[] = {
|
|
|
+ { .name = "soc", },
|
|
|
+ { .type = "soc", },
|
|
|
+ { .name = "cpm", },
|
|
|
+ { .name = "localbus", },
|
|
|
+ {},
|
|
|
+};
|
|
|
+
|
|
|
+static int __init declare_of_platform_devices(void)
|
|
|
+{
|
|
|
+ if (!machine_is(mpc85xx_ads))
|
|
|
+ return 0;
|
|
|
+
|
|
|
+ of_platform_bus_probe(NULL, of_bus_ids, NULL);
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+device_initcall(declare_of_platform_devices);
|
|
|
+
|
|
|
/*
|
|
|
* Called very early, device-tree isn't unflattened
|
|
|
*/
|