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@@ -22,7 +22,7 @@ This document describes the Linux kernel Makefiles.
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=== 4 Host Program support
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=== 4 Host Program support
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--- 4.1 Simple Host Program
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--- 4.1 Simple Host Program
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--- 4.2 Composite Host Programs
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--- 4.2 Composite Host Programs
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- --- 4.3 Defining shared libraries
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+ --- 4.3 Defining shared libraries
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--- 4.4 Using C++ for host programs
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--- 4.4 Using C++ for host programs
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--- 4.5 Controlling compiler options for host programs
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--- 4.5 Controlling compiler options for host programs
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--- 4.6 When host programs are actually built
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--- 4.6 When host programs are actually built
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@@ -69,7 +69,7 @@ architecture-specific information to the top Makefile.
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Each subdirectory has a kbuild Makefile which carries out the commands
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Each subdirectory has a kbuild Makefile which carries out the commands
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passed down from above. The kbuild Makefile uses information from the
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passed down from above. The kbuild Makefile uses information from the
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-.config file to construct various file lists used by kbuild to build
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+.config file to construct various file lists used by kbuild to build
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any built-in or modular targets.
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any built-in or modular targets.
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scripts/Makefile.* contains all the definitions/rules etc. that
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scripts/Makefile.* contains all the definitions/rules etc. that
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@@ -86,7 +86,7 @@ any kernel Makefiles (or any other source files).
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*Normal developers* are people who work on features such as device
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*Normal developers* are people who work on features such as device
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drivers, file systems, and network protocols. These people need to
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drivers, file systems, and network protocols. These people need to
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-maintain the kbuild Makefiles for the subsystem that they are
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+maintain the kbuild Makefiles for the subsystem they are
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working on. In order to do this effectively, they need some overall
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working on. In order to do this effectively, they need some overall
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knowledge about the kernel Makefiles, plus detailed knowledge about the
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knowledge about the kernel Makefiles, plus detailed knowledge about the
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public interface for kbuild.
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public interface for kbuild.
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@@ -104,10 +104,10 @@ This document is aimed towards normal developers and arch developers.
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=== 3 The kbuild files
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=== 3 The kbuild files
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Most Makefiles within the kernel are kbuild Makefiles that use the
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Most Makefiles within the kernel are kbuild Makefiles that use the
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-kbuild infrastructure. This chapter introduce the syntax used in the
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+kbuild infrastructure. This chapter introduces the syntax used in the
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kbuild makefiles.
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kbuild makefiles.
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The preferred name for the kbuild files are 'Makefile' but 'Kbuild' can
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The preferred name for the kbuild files are 'Makefile' but 'Kbuild' can
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-be used and if both a 'Makefile' and a 'Kbuild' file exists then the 'Kbuild'
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+be used and if both a 'Makefile' and a 'Kbuild' file exists, then the 'Kbuild'
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file will be used.
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file will be used.
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Section 3.1 "Goal definitions" is a quick intro, further chapters provide
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Section 3.1 "Goal definitions" is a quick intro, further chapters provide
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@@ -124,7 +124,7 @@ more details, with real examples.
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Example:
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Example:
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obj-y += foo.o
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obj-y += foo.o
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- This tell kbuild that there is one object in that directory named
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+ This tell kbuild that there is one object in that directory, named
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foo.o. foo.o will be built from foo.c or foo.S.
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foo.o. foo.o will be built from foo.c or foo.S.
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If foo.o shall be built as a module, the variable obj-m is used.
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If foo.o shall be built as a module, the variable obj-m is used.
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@@ -140,7 +140,7 @@ more details, with real examples.
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--- 3.2 Built-in object goals - obj-y
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--- 3.2 Built-in object goals - obj-y
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The kbuild Makefile specifies object files for vmlinux
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The kbuild Makefile specifies object files for vmlinux
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- in the lists $(obj-y). These lists depend on the kernel
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+ in the $(obj-y) lists. These lists depend on the kernel
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configuration.
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configuration.
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Kbuild compiles all the $(obj-y) files. It then calls
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Kbuild compiles all the $(obj-y) files. It then calls
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@@ -154,8 +154,8 @@ more details, with real examples.
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Link order is significant, because certain functions
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Link order is significant, because certain functions
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(module_init() / __initcall) will be called during boot in the
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(module_init() / __initcall) will be called during boot in the
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order they appear. So keep in mind that changing the link
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order they appear. So keep in mind that changing the link
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- order may e.g. change the order in which your SCSI
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- controllers are detected, and thus you disks are renumbered.
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+ order may e.g. change the order in which your SCSI
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+ controllers are detected, and thus your disks are renumbered.
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Example:
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Example:
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#drivers/isdn/i4l/Makefile
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#drivers/isdn/i4l/Makefile
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@@ -203,11 +203,11 @@ more details, with real examples.
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Example:
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Example:
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#fs/ext2/Makefile
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#fs/ext2/Makefile
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obj-$(CONFIG_EXT2_FS) += ext2.o
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obj-$(CONFIG_EXT2_FS) += ext2.o
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- ext2-y := balloc.o bitmap.o
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+ ext2-y := balloc.o bitmap.o
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ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o
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ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o
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-
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- In this example xattr.o is only part of the composite object
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- ext2.o, if $(CONFIG_EXT2_FS_XATTR) evaluates to 'y'.
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+
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+ In this example, xattr.o is only part of the composite object
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+ ext2.o if $(CONFIG_EXT2_FS_XATTR) evaluates to 'y'.
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Note: Of course, when you are building objects into the kernel,
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Note: Of course, when you are building objects into the kernel,
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the syntax above will also work. So, if you have CONFIG_EXT2_FS=y,
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the syntax above will also work. So, if you have CONFIG_EXT2_FS=y,
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@@ -221,16 +221,16 @@ more details, with real examples.
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--- 3.5 Library file goals - lib-y
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--- 3.5 Library file goals - lib-y
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- Objects listed with obj-* are used for modules or
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+ Objects listed with obj-* are used for modules, or
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combined in a built-in.o for that specific directory.
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combined in a built-in.o for that specific directory.
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There is also the possibility to list objects that will
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There is also the possibility to list objects that will
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be included in a library, lib.a.
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be included in a library, lib.a.
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All objects listed with lib-y are combined in a single
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All objects listed with lib-y are combined in a single
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library for that directory.
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library for that directory.
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- Objects that are listed in obj-y and additional listed in
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+ Objects that are listed in obj-y and additionaly listed in
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lib-y will not be included in the library, since they will anyway
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lib-y will not be included in the library, since they will anyway
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be accessible.
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be accessible.
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- For consistency objects listed in lib-m will be included in lib.a.
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+ For consistency, objects listed in lib-m will be included in lib.a.
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Note that the same kbuild makefile may list files to be built-in
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Note that the same kbuild makefile may list files to be built-in
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and to be part of a library. Therefore the same directory
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and to be part of a library. Therefore the same directory
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@@ -241,11 +241,11 @@ more details, with real examples.
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lib-y := checksum.o delay.o
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lib-y := checksum.o delay.o
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This will create a library lib.a based on checksum.o and delay.o.
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This will create a library lib.a based on checksum.o and delay.o.
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- For kbuild to actually recognize that there is a lib.a being build
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+ For kbuild to actually recognize that there is a lib.a being built,
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the directory shall be listed in libs-y.
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the directory shall be listed in libs-y.
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See also "6.3 List directories to visit when descending".
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See also "6.3 List directories to visit when descending".
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-
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- Usage of lib-y is normally restricted to lib/ and arch/*/lib.
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+
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+ Use of lib-y is normally restricted to lib/ and arch/*/lib.
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--- 3.6 Descending down in directories
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--- 3.6 Descending down in directories
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@@ -255,7 +255,7 @@ more details, with real examples.
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invoke make recursively in subdirectories, provided you let it know of
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invoke make recursively in subdirectories, provided you let it know of
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them.
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them.
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- To do so obj-y and obj-m are used.
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+ To do so, obj-y and obj-m are used.
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ext2 lives in a separate directory, and the Makefile present in fs/
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ext2 lives in a separate directory, and the Makefile present in fs/
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tells kbuild to descend down using the following assignment.
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tells kbuild to descend down using the following assignment.
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@@ -353,8 +353,8 @@ more details, with real examples.
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Special rules are used when the kbuild infrastructure does
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Special rules are used when the kbuild infrastructure does
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not provide the required support. A typical example is
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not provide the required support. A typical example is
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header files generated during the build process.
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header files generated during the build process.
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- Another example is the architecture specific Makefiles which
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- needs special rules to prepare boot images etc.
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+ Another example are the architecture specific Makefiles which
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+ need special rules to prepare boot images etc.
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Special rules are written as normal Make rules.
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Special rules are written as normal Make rules.
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Kbuild is not executing in the directory where the Makefile is
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Kbuild is not executing in the directory where the Makefile is
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@@ -387,28 +387,28 @@ more details, with real examples.
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--- 3.11 $(CC) support functions
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--- 3.11 $(CC) support functions
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- The kernel may be build with several different versions of
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+ The kernel may be built with several different versions of
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$(CC), each supporting a unique set of features and options.
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$(CC), each supporting a unique set of features and options.
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kbuild provide basic support to check for valid options for $(CC).
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kbuild provide basic support to check for valid options for $(CC).
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$(CC) is useally the gcc compiler, but other alternatives are
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$(CC) is useally the gcc compiler, but other alternatives are
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available.
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available.
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as-option
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as-option
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- as-option is used to check if $(CC) when used to compile
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- assembler (*.S) files supports the given option. An optional
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- second option may be specified if first option are not supported.
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+ as-option is used to check if $(CC) -- when used to compile
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+ assembler (*.S) files -- supports the given option. An optional
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+ second option may be specified if the first option is not supported.
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Example:
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Example:
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#arch/sh/Makefile
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#arch/sh/Makefile
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cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),)
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cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),)
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- In the above example cflags-y will be assinged the the option
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+ In the above example, cflags-y will be assigned the option
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-Wa$(comma)-isa=$(isa-y) if it is supported by $(CC).
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-Wa$(comma)-isa=$(isa-y) if it is supported by $(CC).
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The second argument is optional, and if supplied will be used
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The second argument is optional, and if supplied will be used
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if first argument is not supported.
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if first argument is not supported.
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ld-option
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ld-option
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- ld-option is used to check if $(CC) when used to link object files
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+ ld-option is used to check if $(CC) when used to link object files
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supports the given option. An optional second option may be
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supports the given option. An optional second option may be
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specified if first option are not supported.
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specified if first option are not supported.
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@@ -421,8 +421,13 @@ more details, with real examples.
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The second argument is optional, and if supplied will be used
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The second argument is optional, and if supplied will be used
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if first argument is not supported.
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if first argument is not supported.
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+ as-instr
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+ as-instr checks if the assembler reports a specific instruction
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+ and then outputs either option1 or option2
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+ C escapes are supported in the test instruction
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+
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cc-option
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cc-option
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- cc-option is used to check if $(CC) support a given option, and not
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+ cc-option is used to check if $(CC) supports a given option, and not
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supported to use an optional second option.
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supported to use an optional second option.
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Example:
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Example:
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@@ -430,12 +435,12 @@ more details, with real examples.
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cflags-y += $(call cc-option,-march=pentium-mmx,-march=i586)
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cflags-y += $(call cc-option,-march=pentium-mmx,-march=i586)
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In the above example cflags-y will be assigned the option
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In the above example cflags-y will be assigned the option
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- -march=pentium-mmx if supported by $(CC), otherwise -march-i586.
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- The second argument to cc-option is optional, and if omitted
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+ -march=pentium-mmx if supported by $(CC), otherwise -march=i586.
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+ The second argument to cc-option is optional, and if omitted,
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cflags-y will be assigned no value if first option is not supported.
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cflags-y will be assigned no value if first option is not supported.
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cc-option-yn
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cc-option-yn
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- cc-option-yn is used to check if gcc supports a given option
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+ cc-option-yn is used to check if gcc supports a given option
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and return 'y' if supported, otherwise 'n'.
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and return 'y' if supported, otherwise 'n'.
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Example:
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Example:
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@@ -443,32 +448,33 @@ more details, with real examples.
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biarch := $(call cc-option-yn, -m32)
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biarch := $(call cc-option-yn, -m32)
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aflags-$(biarch) += -a32
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aflags-$(biarch) += -a32
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cflags-$(biarch) += -m32
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cflags-$(biarch) += -m32
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-
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- In the above example $(biarch) is set to y if $(CC) supports the -m32
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- option. When $(biarch) equals to y the expanded variables $(aflags-y)
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- and $(cflags-y) will be assigned the values -a32 and -m32.
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+
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+ In the above example, $(biarch) is set to y if $(CC) supports the -m32
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+ option. When $(biarch) equals 'y', the expanded variables $(aflags-y)
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+ and $(cflags-y) will be assigned the values -a32 and -m32,
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+ respectively.
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cc-option-align
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cc-option-align
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- gcc version >= 3.0 shifted type of options used to speify
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- alignment of functions, loops etc. $(cc-option-align) whrn used
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- as prefix to the align options will select the right prefix:
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+ gcc versions >= 3.0 changed the type of options used to specify
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+ alignment of functions, loops etc. $(cc-option-align), when used
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+ as prefix to the align options, will select the right prefix:
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gcc < 3.00
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gcc < 3.00
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cc-option-align = -malign
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cc-option-align = -malign
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gcc >= 3.00
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gcc >= 3.00
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cc-option-align = -falign
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cc-option-align = -falign
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-
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+
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Example:
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Example:
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CFLAGS += $(cc-option-align)-functions=4
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CFLAGS += $(cc-option-align)-functions=4
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- In the above example the option -falign-functions=4 is used for
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- gcc >= 3.00. For gcc < 3.00 -malign-functions=4 is used.
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-
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+ In the above example, the option -falign-functions=4 is used for
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+ gcc >= 3.00. For gcc < 3.00, -malign-functions=4 is used.
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+
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cc-version
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cc-version
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- cc-version return a numerical version of the $(CC) compiler version.
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+ cc-version returns a numerical version of the $(CC) compiler version.
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The format is <major><minor> where both are two digits. So for example
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The format is <major><minor> where both are two digits. So for example
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gcc 3.41 would return 0341.
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gcc 3.41 would return 0341.
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cc-version is useful when a specific $(CC) version is faulty in one
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cc-version is useful when a specific $(CC) version is faulty in one
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- area, for example the -mregparm=3 were broken in some gcc version
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+ area, for example -mregparm=3 was broken in some gcc versions
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even though the option was accepted by gcc.
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even though the option was accepted by gcc.
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Example:
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Example:
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@@ -477,20 +483,20 @@ more details, with real examples.
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if [ $(call cc-version) -ge 0300 ] ; then \
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if [ $(call cc-version) -ge 0300 ] ; then \
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echo "-mregparm=3"; fi ;)
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echo "-mregparm=3"; fi ;)
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- In the above example -mregparm=3 is only used for gcc version greater
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+ In the above example, -mregparm=3 is only used for gcc version greater
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than or equal to gcc 3.0.
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than or equal to gcc 3.0.
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cc-ifversion
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cc-ifversion
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- cc-ifversion test the version of $(CC) and equals last argument if
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+ cc-ifversion tests the version of $(CC) and equals last argument if
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version expression is true.
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version expression is true.
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Example:
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Example:
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#fs/reiserfs/Makefile
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#fs/reiserfs/Makefile
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EXTRA_CFLAGS := $(call cc-ifversion, -lt, 0402, -O1)
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EXTRA_CFLAGS := $(call cc-ifversion, -lt, 0402, -O1)
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- In this example EXTRA_CFLAGS will be assigned the value -O1 if the
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+ In this example, EXTRA_CFLAGS will be assigned the value -O1 if the
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$(CC) version is less than 4.2.
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$(CC) version is less than 4.2.
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- cc-ifversion takes all the shell operators:
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+ cc-ifversion takes all the shell operators:
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-eq, -ne, -lt, -le, -gt, and -ge
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-eq, -ne, -lt, -le, -gt, and -ge
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The third parameter may be a text as in this example, but it may also
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The third parameter may be a text as in this example, but it may also
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be an expanded variable or a macro.
|
|
be an expanded variable or a macro.
|
|
@@ -506,7 +512,7 @@ The first step is to tell kbuild that a host program exists. This is
|
|
done utilising the variable hostprogs-y.
|
|
done utilising the variable hostprogs-y.
|
|
|
|
|
|
The second step is to add an explicit dependency to the executable.
|
|
The second step is to add an explicit dependency to the executable.
|
|
-This can be done in two ways. Either add the dependency in a rule,
|
|
|
|
|
|
+This can be done in two ways. Either add the dependency in a rule,
|
|
or utilise the variable $(always).
|
|
or utilise the variable $(always).
|
|
Both possibilities are described in the following.
|
|
Both possibilities are described in the following.
|
|
|
|
|
|
@@ -523,28 +529,28 @@ Both possibilities are described in the following.
|
|
Kbuild assumes in the above example that bin2hex is made from a single
|
|
Kbuild assumes in the above example that bin2hex is made from a single
|
|
c-source file named bin2hex.c located in the same directory as
|
|
c-source file named bin2hex.c located in the same directory as
|
|
the Makefile.
|
|
the Makefile.
|
|
-
|
|
|
|
|
|
+
|
|
--- 4.2 Composite Host Programs
|
|
--- 4.2 Composite Host Programs
|
|
|
|
|
|
Host programs can be made up based on composite objects.
|
|
Host programs can be made up based on composite objects.
|
|
The syntax used to define composite objects for host programs is
|
|
The syntax used to define composite objects for host programs is
|
|
similar to the syntax used for kernel objects.
|
|
similar to the syntax used for kernel objects.
|
|
- $(<executeable>-objs) list all objects used to link the final
|
|
|
|
|
|
+ $(<executeable>-objs) lists all objects used to link the final
|
|
executable.
|
|
executable.
|
|
|
|
|
|
Example:
|
|
Example:
|
|
#scripts/lxdialog/Makefile
|
|
#scripts/lxdialog/Makefile
|
|
- hostprogs-y := lxdialog
|
|
|
|
|
|
+ hostprogs-y := lxdialog
|
|
lxdialog-objs := checklist.o lxdialog.o
|
|
lxdialog-objs := checklist.o lxdialog.o
|
|
|
|
|
|
Objects with extension .o are compiled from the corresponding .c
|
|
Objects with extension .o are compiled from the corresponding .c
|
|
- files. In the above example checklist.c is compiled to checklist.o
|
|
|
|
|
|
+ files. In the above example, checklist.c is compiled to checklist.o
|
|
and lxdialog.c is compiled to lxdialog.o.
|
|
and lxdialog.c is compiled to lxdialog.o.
|
|
- Finally the two .o files are linked to the executable, lxdialog.
|
|
|
|
|
|
+ Finally, the two .o files are linked to the executable, lxdialog.
|
|
Note: The syntax <executable>-y is not permitted for host-programs.
|
|
Note: The syntax <executable>-y is not permitted for host-programs.
|
|
|
|
|
|
---- 4.3 Defining shared libraries
|
|
|
|
-
|
|
|
|
|
|
+--- 4.3 Defining shared libraries
|
|
|
|
+
|
|
Objects with extension .so are considered shared libraries, and
|
|
Objects with extension .so are considered shared libraries, and
|
|
will be compiled as position independent objects.
|
|
will be compiled as position independent objects.
|
|
Kbuild provides support for shared libraries, but the usage
|
|
Kbuild provides support for shared libraries, but the usage
|
|
@@ -557,7 +563,7 @@ Both possibilities are described in the following.
|
|
hostprogs-y := conf
|
|
hostprogs-y := conf
|
|
conf-objs := conf.o libkconfig.so
|
|
conf-objs := conf.o libkconfig.so
|
|
libkconfig-objs := expr.o type.o
|
|
libkconfig-objs := expr.o type.o
|
|
-
|
|
|
|
|
|
+
|
|
Shared libraries always require a corresponding -objs line, and
|
|
Shared libraries always require a corresponding -objs line, and
|
|
in the example above the shared library libkconfig is composed by
|
|
in the example above the shared library libkconfig is composed by
|
|
the two objects expr.o and type.o.
|
|
the two objects expr.o and type.o.
|
|
@@ -578,7 +584,7 @@ Both possibilities are described in the following.
|
|
|
|
|
|
In the example above the executable is composed of the C++ file
|
|
In the example above the executable is composed of the C++ file
|
|
qconf.cc - identified by $(qconf-cxxobjs).
|
|
qconf.cc - identified by $(qconf-cxxobjs).
|
|
-
|
|
|
|
|
|
+
|
|
If qconf is composed by a mixture of .c and .cc files, then an
|
|
If qconf is composed by a mixture of .c and .cc files, then an
|
|
additional line can be used to identify this.
|
|
additional line can be used to identify this.
|
|
|
|
|
|
@@ -587,34 +593,35 @@ Both possibilities are described in the following.
|
|
hostprogs-y := qconf
|
|
hostprogs-y := qconf
|
|
qconf-cxxobjs := qconf.o
|
|
qconf-cxxobjs := qconf.o
|
|
qconf-objs := check.o
|
|
qconf-objs := check.o
|
|
-
|
|
|
|
|
|
+
|
|
--- 4.5 Controlling compiler options for host programs
|
|
--- 4.5 Controlling compiler options for host programs
|
|
|
|
|
|
When compiling host programs, it is possible to set specific flags.
|
|
When compiling host programs, it is possible to set specific flags.
|
|
The programs will always be compiled utilising $(HOSTCC) passed
|
|
The programs will always be compiled utilising $(HOSTCC) passed
|
|
the options specified in $(HOSTCFLAGS).
|
|
the options specified in $(HOSTCFLAGS).
|
|
To set flags that will take effect for all host programs created
|
|
To set flags that will take effect for all host programs created
|
|
- in that Makefile use the variable HOST_EXTRACFLAGS.
|
|
|
|
|
|
+ in that Makefile, use the variable HOST_EXTRACFLAGS.
|
|
|
|
|
|
Example:
|
|
Example:
|
|
#scripts/lxdialog/Makefile
|
|
#scripts/lxdialog/Makefile
|
|
HOST_EXTRACFLAGS += -I/usr/include/ncurses
|
|
HOST_EXTRACFLAGS += -I/usr/include/ncurses
|
|
-
|
|
|
|
|
|
+
|
|
To set specific flags for a single file the following construction
|
|
To set specific flags for a single file the following construction
|
|
is used:
|
|
is used:
|
|
|
|
|
|
Example:
|
|
Example:
|
|
#arch/ppc64/boot/Makefile
|
|
#arch/ppc64/boot/Makefile
|
|
HOSTCFLAGS_piggyback.o := -DKERNELBASE=$(KERNELBASE)
|
|
HOSTCFLAGS_piggyback.o := -DKERNELBASE=$(KERNELBASE)
|
|
-
|
|
|
|
|
|
+
|
|
It is also possible to specify additional options to the linker.
|
|
It is also possible to specify additional options to the linker.
|
|
-
|
|
|
|
|
|
+
|
|
Example:
|
|
Example:
|
|
#scripts/kconfig/Makefile
|
|
#scripts/kconfig/Makefile
|
|
HOSTLOADLIBES_qconf := -L$(QTDIR)/lib
|
|
HOSTLOADLIBES_qconf := -L$(QTDIR)/lib
|
|
|
|
|
|
- When linking qconf it will be passed the extra option "-L$(QTDIR)/lib".
|
|
|
|
-
|
|
|
|
|
|
+ When linking qconf, it will be passed the extra option
|
|
|
|
+ "-L$(QTDIR)/lib".
|
|
|
|
+
|
|
--- 4.6 When host programs are actually built
|
|
--- 4.6 When host programs are actually built
|
|
|
|
|
|
Kbuild will only build host-programs when they are referenced
|
|
Kbuild will only build host-programs when they are referenced
|
|
@@ -629,7 +636,7 @@ Both possibilities are described in the following.
|
|
$(obj)/devlist.h: $(src)/pci.ids $(obj)/gen-devlist
|
|
$(obj)/devlist.h: $(src)/pci.ids $(obj)/gen-devlist
|
|
( cd $(obj); ./gen-devlist ) < $<
|
|
( cd $(obj); ./gen-devlist ) < $<
|
|
|
|
|
|
- The target $(obj)/devlist.h will not be built before
|
|
|
|
|
|
+ The target $(obj)/devlist.h will not be built before
|
|
$(obj)/gen-devlist is updated. Note that references to
|
|
$(obj)/gen-devlist is updated. Note that references to
|
|
the host programs in special rules must be prefixed with $(obj).
|
|
the host programs in special rules must be prefixed with $(obj).
|
|
|
|
|
|
@@ -648,7 +655,7 @@ Both possibilities are described in the following.
|
|
|
|
|
|
--- 4.7 Using hostprogs-$(CONFIG_FOO)
|
|
--- 4.7 Using hostprogs-$(CONFIG_FOO)
|
|
|
|
|
|
- A typcal pattern in a Kbuild file lok like this:
|
|
|
|
|
|
+ A typical pattern in a Kbuild file looks like this:
|
|
|
|
|
|
Example:
|
|
Example:
|
|
#scripts/Makefile
|
|
#scripts/Makefile
|
|
@@ -656,13 +663,13 @@ Both possibilities are described in the following.
|
|
|
|
|
|
Kbuild knows about both 'y' for built-in and 'm' for module.
|
|
Kbuild knows about both 'y' for built-in and 'm' for module.
|
|
So if a config symbol evaluate to 'm', kbuild will still build
|
|
So if a config symbol evaluate to 'm', kbuild will still build
|
|
- the binary. In other words Kbuild handle hostprogs-m exactly
|
|
|
|
- like hostprogs-y. But only hostprogs-y is recommend used
|
|
|
|
- when no CONFIG symbol are involved.
|
|
|
|
|
|
+ the binary. In other words, Kbuild handles hostprogs-m exactly
|
|
|
|
+ like hostprogs-y. But only hostprogs-y is recommended to be used
|
|
|
|
+ when no CONFIG symbols are involved.
|
|
|
|
|
|
=== 5 Kbuild clean infrastructure
|
|
=== 5 Kbuild clean infrastructure
|
|
|
|
|
|
-"make clean" deletes most generated files in the src tree where the kernel
|
|
|
|
|
|
+"make clean" deletes most generated files in the obj tree where the kernel
|
|
is compiled. This includes generated files such as host programs.
|
|
is compiled. This includes generated files such as host programs.
|
|
Kbuild knows targets listed in $(hostprogs-y), $(hostprogs-m), $(always),
|
|
Kbuild knows targets listed in $(hostprogs-y), $(hostprogs-m), $(always),
|
|
$(extra-y) and $(targets). They are all deleted during "make clean".
|
|
$(extra-y) and $(targets). They are all deleted during "make clean".
|
|
@@ -680,7 +687,8 @@ When executing "make clean", the two files "devlist.h classlist.h" will
|
|
be deleted. Kbuild will assume files to be in same relative directory as the
|
|
be deleted. Kbuild will assume files to be in same relative directory as the
|
|
Makefile except if an absolute path is specified (path starting with '/').
|
|
Makefile except if an absolute path is specified (path starting with '/').
|
|
|
|
|
|
-To delete a directory hirachy use:
|
|
|
|
|
|
+To delete a directory hierarchy use:
|
|
|
|
+
|
|
Example:
|
|
Example:
|
|
#scripts/package/Makefile
|
|
#scripts/package/Makefile
|
|
clean-dirs := $(objtree)/debian/
|
|
clean-dirs := $(objtree)/debian/
|
|
@@ -723,29 +731,29 @@ be visited during "make clean".
|
|
|
|
|
|
The top level Makefile sets up the environment and does the preparation,
|
|
The top level Makefile sets up the environment and does the preparation,
|
|
before starting to descend down in the individual directories.
|
|
before starting to descend down in the individual directories.
|
|
-The top level makefile contains the generic part, whereas the
|
|
|
|
-arch/$(ARCH)/Makefile contains what is required to set-up kbuild
|
|
|
|
-to the said architecture.
|
|
|
|
-To do so arch/$(ARCH)/Makefile sets a number of variables, and defines
|
|
|
|
|
|
+The top level makefile contains the generic part, whereas
|
|
|
|
+arch/$(ARCH)/Makefile contains what is required to set up kbuild
|
|
|
|
+for said architecture.
|
|
|
|
+To do so, arch/$(ARCH)/Makefile sets up a number of variables and defines
|
|
a few targets.
|
|
a few targets.
|
|
|
|
|
|
-When kbuild executes the following steps are followed (roughly):
|
|
|
|
-1) Configuration of the kernel => produced .config
|
|
|
|
|
|
+When kbuild executes, the following steps are followed (roughly):
|
|
|
|
+1) Configuration of the kernel => produce .config
|
|
2) Store kernel version in include/linux/version.h
|
|
2) Store kernel version in include/linux/version.h
|
|
3) Symlink include/asm to include/asm-$(ARCH)
|
|
3) Symlink include/asm to include/asm-$(ARCH)
|
|
4) Updating all other prerequisites to the target prepare:
|
|
4) Updating all other prerequisites to the target prepare:
|
|
- Additional prerequisites are specified in arch/$(ARCH)/Makefile
|
|
- Additional prerequisites are specified in arch/$(ARCH)/Makefile
|
|
5) Recursively descend down in all directories listed in
|
|
5) Recursively descend down in all directories listed in
|
|
init-* core* drivers-* net-* libs-* and build all targets.
|
|
init-* core* drivers-* net-* libs-* and build all targets.
|
|
- - The value of the above variables are extended in arch/$(ARCH)/Makefile.
|
|
|
|
-6) All object files are then linked and the resulting file vmlinux is
|
|
|
|
- located at the root of the src tree.
|
|
|
|
|
|
+ - The values of the above variables are expanded in arch/$(ARCH)/Makefile.
|
|
|
|
+6) All object files are then linked and the resulting file vmlinux is
|
|
|
|
+ located at the root of the obj tree.
|
|
The very first objects linked are listed in head-y, assigned by
|
|
The very first objects linked are listed in head-y, assigned by
|
|
arch/$(ARCH)/Makefile.
|
|
arch/$(ARCH)/Makefile.
|
|
-7) Finally the architecture specific part does any required post processing
|
|
|
|
|
|
+7) Finally, the architecture specific part does any required post processing
|
|
and builds the final bootimage.
|
|
and builds the final bootimage.
|
|
- This includes building boot records
|
|
- This includes building boot records
|
|
- - Preparing initrd images and the like
|
|
|
|
|
|
+ - Preparing initrd images and thelike
|
|
|
|
|
|
|
|
|
|
--- 6.1 Set variables to tweak the build to the architecture
|
|
--- 6.1 Set variables to tweak the build to the architecture
|
|
@@ -760,7 +768,7 @@ When kbuild executes the following steps are followed (roughly):
|
|
LDFLAGS := -m elf_s390
|
|
LDFLAGS := -m elf_s390
|
|
Note: EXTRA_LDFLAGS and LDFLAGS_$@ can be used to further customise
|
|
Note: EXTRA_LDFLAGS and LDFLAGS_$@ can be used to further customise
|
|
the flags used. See chapter 7.
|
|
the flags used. See chapter 7.
|
|
-
|
|
|
|
|
|
+
|
|
LDFLAGS_MODULE Options for $(LD) when linking modules
|
|
LDFLAGS_MODULE Options for $(LD) when linking modules
|
|
|
|
|
|
LDFLAGS_MODULE is used to set specific flags for $(LD) when
|
|
LDFLAGS_MODULE is used to set specific flags for $(LD) when
|
|
@@ -770,7 +778,7 @@ When kbuild executes the following steps are followed (roughly):
|
|
LDFLAGS_vmlinux Options for $(LD) when linking vmlinux
|
|
LDFLAGS_vmlinux Options for $(LD) when linking vmlinux
|
|
|
|
|
|
LDFLAGS_vmlinux is used to specify additional flags to pass to
|
|
LDFLAGS_vmlinux is used to specify additional flags to pass to
|
|
- the linker when linking the final vmlinux.
|
|
|
|
|
|
+ the linker when linking the final vmlinux image.
|
|
LDFLAGS_vmlinux uses the LDFLAGS_$@ support.
|
|
LDFLAGS_vmlinux uses the LDFLAGS_$@ support.
|
|
|
|
|
|
Example:
|
|
Example:
|
|
@@ -780,7 +788,7 @@ When kbuild executes the following steps are followed (roughly):
|
|
OBJCOPYFLAGS objcopy flags
|
|
OBJCOPYFLAGS objcopy flags
|
|
|
|
|
|
When $(call if_changed,objcopy) is used to translate a .o file,
|
|
When $(call if_changed,objcopy) is used to translate a .o file,
|
|
- then the flags specified in OBJCOPYFLAGS will be used.
|
|
|
|
|
|
+ the flags specified in OBJCOPYFLAGS will be used.
|
|
$(call if_changed,objcopy) is often used to generate raw binaries on
|
|
$(call if_changed,objcopy) is often used to generate raw binaries on
|
|
vmlinux.
|
|
vmlinux.
|
|
|
|
|
|
@@ -792,7 +800,7 @@ When kbuild executes the following steps are followed (roughly):
|
|
$(obj)/image: vmlinux FORCE
|
|
$(obj)/image: vmlinux FORCE
|
|
$(call if_changed,objcopy)
|
|
$(call if_changed,objcopy)
|
|
|
|
|
|
- In this example the binary $(obj)/image is a binary version of
|
|
|
|
|
|
+ In this example, the binary $(obj)/image is a binary version of
|
|
vmlinux. The usage of $(call if_changed,xxx) will be described later.
|
|
vmlinux. The usage of $(call if_changed,xxx) will be described later.
|
|
|
|
|
|
AFLAGS $(AS) assembler flags
|
|
AFLAGS $(AS) assembler flags
|
|
@@ -809,7 +817,7 @@ When kbuild executes the following steps are followed (roughly):
|
|
Default value - see top level Makefile
|
|
Default value - see top level Makefile
|
|
Append or modify as required per architecture.
|
|
Append or modify as required per architecture.
|
|
|
|
|
|
- Often the CFLAGS variable depends on the configuration.
|
|
|
|
|
|
+ Often, the CFLAGS variable depends on the configuration.
|
|
|
|
|
|
Example:
|
|
Example:
|
|
#arch/i386/Makefile
|
|
#arch/i386/Makefile
|
|
@@ -830,7 +838,7 @@ When kbuild executes the following steps are followed (roughly):
|
|
...
|
|
...
|
|
|
|
|
|
|
|
|
|
- The first examples utilises the trick that a config option expands
|
|
|
|
|
|
+ The first example utilises the trick that a config option expands
|
|
to 'y' when selected.
|
|
to 'y' when selected.
|
|
|
|
|
|
CFLAGS_KERNEL $(CC) options specific for built-in
|
|
CFLAGS_KERNEL $(CC) options specific for built-in
|
|
@@ -843,18 +851,18 @@ When kbuild executes the following steps are followed (roughly):
|
|
$(CFLAGS_MODULE) contains extra C compiler flags used to compile code
|
|
$(CFLAGS_MODULE) contains extra C compiler flags used to compile code
|
|
for loadable kernel modules.
|
|
for loadable kernel modules.
|
|
|
|
|
|
-
|
|
|
|
|
|
+
|
|
--- 6.2 Add prerequisites to archprepare:
|
|
--- 6.2 Add prerequisites to archprepare:
|
|
|
|
|
|
- The archprepare: rule is used to list prerequisites that needs to be
|
|
|
|
|
|
+ The archprepare: rule is used to list prerequisites that need to be
|
|
built before starting to descend down in the subdirectories.
|
|
built before starting to descend down in the subdirectories.
|
|
- This is usual header files containing assembler constants.
|
|
|
|
|
|
+ This is usually used for header files containing assembler constants.
|
|
|
|
|
|
Example:
|
|
Example:
|
|
#arch/arm/Makefile
|
|
#arch/arm/Makefile
|
|
archprepare: maketools
|
|
archprepare: maketools
|
|
|
|
|
|
- In this example the file target maketools will be processed
|
|
|
|
|
|
+ In this example, the file target maketools will be processed
|
|
before descending down in the subdirectories.
|
|
before descending down in the subdirectories.
|
|
See also chapter XXX-TODO that describe how kbuild supports
|
|
See also chapter XXX-TODO that describe how kbuild supports
|
|
generating offset header files.
|
|
generating offset header files.
|
|
@@ -867,18 +875,19 @@ When kbuild executes the following steps are followed (roughly):
|
|
corresponding arch-specific section for modules; the module-building
|
|
corresponding arch-specific section for modules; the module-building
|
|
machinery is all architecture-independent.
|
|
machinery is all architecture-independent.
|
|
|
|
|
|
-
|
|
|
|
|
|
+
|
|
head-y, init-y, core-y, libs-y, drivers-y, net-y
|
|
head-y, init-y, core-y, libs-y, drivers-y, net-y
|
|
|
|
|
|
- $(head-y) list objects to be linked first in vmlinux.
|
|
|
|
- $(libs-y) list directories where a lib.a archive can be located.
|
|
|
|
- The rest list directories where a built-in.o object file can be located.
|
|
|
|
|
|
+ $(head-y) lists objects to be linked first in vmlinux.
|
|
|
|
+ $(libs-y) lists directories where a lib.a archive can be located.
|
|
|
|
+ The rest lists directories where a built-in.o object file can be
|
|
|
|
+ located.
|
|
|
|
|
|
$(init-y) objects will be located after $(head-y).
|
|
$(init-y) objects will be located after $(head-y).
|
|
Then the rest follows in this order:
|
|
Then the rest follows in this order:
|
|
$(core-y), $(libs-y), $(drivers-y) and $(net-y).
|
|
$(core-y), $(libs-y), $(drivers-y) and $(net-y).
|
|
|
|
|
|
- The top level Makefile define values for all generic directories,
|
|
|
|
|
|
+ The top level Makefile defines values for all generic directories,
|
|
and arch/$(ARCH)/Makefile only adds architecture specific directories.
|
|
and arch/$(ARCH)/Makefile only adds architecture specific directories.
|
|
|
|
|
|
Example:
|
|
Example:
|
|
@@ -915,27 +924,27 @@ When kbuild executes the following steps are followed (roughly):
|
|
"$(Q)$(MAKE) $(build)=<dir>" is the recommended way to invoke
|
|
"$(Q)$(MAKE) $(build)=<dir>" is the recommended way to invoke
|
|
make in a subdirectory.
|
|
make in a subdirectory.
|
|
|
|
|
|
- There are no rules for naming of the architecture specific targets,
|
|
|
|
|
|
+ There are no rules for naming architecture specific targets,
|
|
but executing "make help" will list all relevant targets.
|
|
but executing "make help" will list all relevant targets.
|
|
- To support this $(archhelp) must be defined.
|
|
|
|
|
|
+ To support this, $(archhelp) must be defined.
|
|
|
|
|
|
Example:
|
|
Example:
|
|
#arch/i386/Makefile
|
|
#arch/i386/Makefile
|
|
define archhelp
|
|
define archhelp
|
|
echo '* bzImage - Image (arch/$(ARCH)/boot/bzImage)'
|
|
echo '* bzImage - Image (arch/$(ARCH)/boot/bzImage)'
|
|
- endef
|
|
|
|
|
|
+ endif
|
|
|
|
|
|
When make is executed without arguments, the first goal encountered
|
|
When make is executed without arguments, the first goal encountered
|
|
will be built. In the top level Makefile the first goal present
|
|
will be built. In the top level Makefile the first goal present
|
|
is all:.
|
|
is all:.
|
|
- An architecture shall always per default build a bootable image.
|
|
|
|
- In "make help" the default goal is highlighted with a '*'.
|
|
|
|
|
|
+ An architecture shall always, per default, build a bootable image.
|
|
|
|
+ In "make help", the default goal is highlighted with a '*'.
|
|
Add a new prerequisite to all: to select a default goal different
|
|
Add a new prerequisite to all: to select a default goal different
|
|
from vmlinux.
|
|
from vmlinux.
|
|
|
|
|
|
Example:
|
|
Example:
|
|
#arch/i386/Makefile
|
|
#arch/i386/Makefile
|
|
- all: bzImage
|
|
|
|
|
|
+ all: bzImage
|
|
|
|
|
|
When "make" is executed without arguments, bzImage will be built.
|
|
When "make" is executed without arguments, bzImage will be built.
|
|
|
|
|
|
@@ -955,10 +964,10 @@ When kbuild executes the following steps are followed (roughly):
|
|
#arch/i386/kernel/Makefile
|
|
#arch/i386/kernel/Makefile
|
|
extra-y := head.o init_task.o
|
|
extra-y := head.o init_task.o
|
|
|
|
|
|
- In this example extra-y is used to list object files that
|
|
|
|
|
|
+ In this example, extra-y is used to list object files that
|
|
shall be built, but shall not be linked as part of built-in.o.
|
|
shall be built, but shall not be linked as part of built-in.o.
|
|
|
|
|
|
-
|
|
|
|
|
|
+
|
|
--- 6.6 Commands useful for building a boot image
|
|
--- 6.6 Commands useful for building a boot image
|
|
|
|
|
|
Kbuild provides a few macros that are useful when building a
|
|
Kbuild provides a few macros that are useful when building a
|
|
@@ -972,8 +981,8 @@ When kbuild executes the following steps are followed (roughly):
|
|
target: source(s) FORCE
|
|
target: source(s) FORCE
|
|
$(call if_changed,ld/objcopy/gzip)
|
|
$(call if_changed,ld/objcopy/gzip)
|
|
|
|
|
|
- When the rule is evaluated it is checked to see if any files
|
|
|
|
- needs an update, or the commandline has changed since last
|
|
|
|
|
|
+ When the rule is evaluated, it is checked to see if any files
|
|
|
|
+ needs an update, or the command line has changed since the last
|
|
invocation. The latter will force a rebuild if any options
|
|
invocation. The latter will force a rebuild if any options
|
|
to the executable have changed.
|
|
to the executable have changed.
|
|
Any target that utilises if_changed must be listed in $(targets),
|
|
Any target that utilises if_changed must be listed in $(targets),
|
|
@@ -991,8 +1000,8 @@ When kbuild executes the following steps are followed (roughly):
|
|
#WRONG!# $(call if_changed, ld/objcopy/gzip)
|
|
#WRONG!# $(call if_changed, ld/objcopy/gzip)
|
|
|
|
|
|
ld
|
|
ld
|
|
- Link target. Often LDFLAGS_$@ is used to set specific options to ld.
|
|
|
|
-
|
|
|
|
|
|
+ Link target. Often, LDFLAGS_$@ is used to set specific options to ld.
|
|
|
|
+
|
|
objcopy
|
|
objcopy
|
|
Copy binary. Uses OBJCOPYFLAGS usually specified in
|
|
Copy binary. Uses OBJCOPYFLAGS usually specified in
|
|
arch/$(ARCH)/Makefile.
|
|
arch/$(ARCH)/Makefile.
|
|
@@ -1010,10 +1019,10 @@ When kbuild executes the following steps are followed (roughly):
|
|
$(obj)/setup $(obj)/bootsect: %: %.o FORCE
|
|
$(obj)/setup $(obj)/bootsect: %: %.o FORCE
|
|
$(call if_changed,ld)
|
|
$(call if_changed,ld)
|
|
|
|
|
|
- In this example there are two possible targets, requiring different
|
|
|
|
- options to the linker. the linker options are specified using the
|
|
|
|
|
|
+ In this example, there are two possible targets, requiring different
|
|
|
|
+ options to the linker. The linker options are specified using the
|
|
LDFLAGS_$@ syntax - one for each potential target.
|
|
LDFLAGS_$@ syntax - one for each potential target.
|
|
- $(targets) are assinged all potential targets, herby kbuild knows
|
|
|
|
|
|
+ $(targets) are assinged all potential targets, by which kbuild knows
|
|
the targets and will:
|
|
the targets and will:
|
|
1) check for commandline changes
|
|
1) check for commandline changes
|
|
2) delete target during make clean
|
|
2) delete target during make clean
|
|
@@ -1027,7 +1036,7 @@ When kbuild executes the following steps are followed (roughly):
|
|
|
|
|
|
--- 6.7 Custom kbuild commands
|
|
--- 6.7 Custom kbuild commands
|
|
|
|
|
|
- When kbuild is executing with KBUILD_VERBOSE=0 then only a shorthand
|
|
|
|
|
|
+ When kbuild is executing with KBUILD_VERBOSE=0, then only a shorthand
|
|
of a command is normally displayed.
|
|
of a command is normally displayed.
|
|
To enable this behaviour for custom commands kbuild requires
|
|
To enable this behaviour for custom commands kbuild requires
|
|
two variables to be set:
|
|
two variables to be set:
|
|
@@ -1045,34 +1054,34 @@ When kbuild executes the following steps are followed (roughly):
|
|
$(call if_changed,image)
|
|
$(call if_changed,image)
|
|
@echo 'Kernel: $@ is ready'
|
|
@echo 'Kernel: $@ is ready'
|
|
|
|
|
|
- When updating the $(obj)/bzImage target the line:
|
|
|
|
|
|
+ When updating the $(obj)/bzImage target, the line
|
|
|
|
|
|
BUILD arch/i386/boot/bzImage
|
|
BUILD arch/i386/boot/bzImage
|
|
|
|
|
|
will be displayed with "make KBUILD_VERBOSE=0".
|
|
will be displayed with "make KBUILD_VERBOSE=0".
|
|
-
|
|
|
|
|
|
+
|
|
|
|
|
|
--- 6.8 Preprocessing linker scripts
|
|
--- 6.8 Preprocessing linker scripts
|
|
|
|
|
|
- When the vmlinux image is build the linker script:
|
|
|
|
|
|
+ When the vmlinux image is built, the linker script
|
|
arch/$(ARCH)/kernel/vmlinux.lds is used.
|
|
arch/$(ARCH)/kernel/vmlinux.lds is used.
|
|
The script is a preprocessed variant of the file vmlinux.lds.S
|
|
The script is a preprocessed variant of the file vmlinux.lds.S
|
|
located in the same directory.
|
|
located in the same directory.
|
|
- kbuild knows .lds file and includes a rule *lds.S -> *lds.
|
|
|
|
-
|
|
|
|
|
|
+ kbuild knows .lds files and includes a rule *lds.S -> *lds.
|
|
|
|
+
|
|
Example:
|
|
Example:
|
|
#arch/i386/kernel/Makefile
|
|
#arch/i386/kernel/Makefile
|
|
always := vmlinux.lds
|
|
always := vmlinux.lds
|
|
-
|
|
|
|
|
|
+
|
|
#Makefile
|
|
#Makefile
|
|
export CPPFLAGS_vmlinux.lds += -P -C -U$(ARCH)
|
|
export CPPFLAGS_vmlinux.lds += -P -C -U$(ARCH)
|
|
-
|
|
|
|
- The assigment to $(always) is used to tell kbuild to build the
|
|
|
|
- target: vmlinux.lds.
|
|
|
|
- The assignment to $(CPPFLAGS_vmlinux.lds) tell kbuild to use the
|
|
|
|
|
|
+
|
|
|
|
+ The assignment to $(always) is used to tell kbuild to build the
|
|
|
|
+ target vmlinux.lds.
|
|
|
|
+ The assignment to $(CPPFLAGS_vmlinux.lds) tells kbuild to use the
|
|
specified options when building the target vmlinux.lds.
|
|
specified options when building the target vmlinux.lds.
|
|
-
|
|
|
|
- When building the *.lds target kbuild used the variakles:
|
|
|
|
|
|
+
|
|
|
|
+ When building the *.lds target, kbuild uses the variables:
|
|
CPPFLAGS : Set in top-level Makefile
|
|
CPPFLAGS : Set in top-level Makefile
|
|
EXTRA_CPPFLAGS : May be set in the kbuild makefile
|
|
EXTRA_CPPFLAGS : May be set in the kbuild makefile
|
|
CPPFLAGS_$(@F) : Target specific flags.
|
|
CPPFLAGS_$(@F) : Target specific flags.
|
|
@@ -1147,7 +1156,7 @@ The top Makefile exports the following variables:
|
|
|
|
|
|
=== 8 Makefile language
|
|
=== 8 Makefile language
|
|
|
|
|
|
-The kernel Makefiles are designed to run with GNU Make. The Makefiles
|
|
|
|
|
|
+The kernel Makefiles are designed to be run with GNU Make. The Makefiles
|
|
use only the documented features of GNU Make, but they do use many
|
|
use only the documented features of GNU Make, but they do use many
|
|
GNU extensions.
|
|
GNU extensions.
|
|
|
|
|
|
@@ -1169,10 +1178,13 @@ is the right choice.
|
|
Original version made by Michael Elizabeth Chastain, <mailto:mec@shout.net>
|
|
Original version made by Michael Elizabeth Chastain, <mailto:mec@shout.net>
|
|
Updates by Kai Germaschewski <kai@tp1.ruhr-uni-bochum.de>
|
|
Updates by Kai Germaschewski <kai@tp1.ruhr-uni-bochum.de>
|
|
Updates by Sam Ravnborg <sam@ravnborg.org>
|
|
Updates by Sam Ravnborg <sam@ravnborg.org>
|
|
|
|
+Language QA by Jan Engelhardt <jengelh@gmx.de>
|
|
|
|
|
|
=== 10 TODO
|
|
=== 10 TODO
|
|
|
|
|
|
-- Describe how kbuild support shipped files with _shipped.
|
|
|
|
|
|
+- Describe how kbuild supports shipped files with _shipped.
|
|
- Generating offset header files.
|
|
- Generating offset header files.
|
|
- Add more variables to section 7?
|
|
- Add more variables to section 7?
|
|
|
|
|
|
|
|
+
|
|
|
|
+
|