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@@ -18,6 +18,22 @@
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#include <plat/gpio-core.h>
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+#ifdef CONFIG_S3C_GPIO_TRACK
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+struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
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+
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+static __init void s3c_gpiolib_track(struct s3c_gpio_chip *chip)
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+{
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+ unsigned int gpn;
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+ int i;
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+
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+ gpn = chip->chip.base;
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+ for (i = 0; i < chip->chip.ngpio; i++, gpn++) {
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+ BUG_ON(gpn > ARRAY_SIZE(s3c_gpios));
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+ s3c_gpios[gpn] = chip;
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+ }
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+}
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+#endif /* CONFIG_S3C_GPIO_TRACK */
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+
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/* Default routines for controlling GPIO, based on the original S3C24XX
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* GPIO functions which deal with the case where each gpio bank of the
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* chip is as following:
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@@ -109,6 +125,7 @@ static int s3c_gpiolib_get(struct gpio_chip *chip, unsigned offset)
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__init void s3c_gpiolib_add(struct s3c_gpio_chip *chip)
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{
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struct gpio_chip *gc = &chip->chip;
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+ int ret;
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BUG_ON(!chip->base);
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BUG_ON(!gc->label);
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@@ -124,5 +141,7 @@ __init void s3c_gpiolib_add(struct s3c_gpio_chip *chip)
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gc->get = s3c_gpiolib_get;
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/* gpiochip_add() prints own failure message on error. */
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- gpiochip_add(gc);
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+ ret = gpiochip_add(gc);
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+ if (ret >= 0)
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+ s3c_gpiolib_track(chip);
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}
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