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powerpc: make dma_window_* in pci_controller struct avail on 32b

Also, convert them to resource_size_t (which is unsigned long
on 64-bit, so it's not a change there).

We will be using these on fsl 32b to indicate the start and size
address of memory that the pci controller can actually reach - this
is needed to determine if an address requires bounce buffering.  For
now, initialize them to a standard value; in the near future, the
value will be calculated based on how the inbound windows are
programmed.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Ben Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Becky Bruce há 16 anos atrás
pai
commit
89d93347d1
2 ficheiros alterados com 8 adições e 2 exclusões
  1. 4 2
      arch/powerpc/include/asm/pci-bridge.h
  2. 4 0
      arch/powerpc/sysdev/fsl_pci.c

+ 4 - 2
arch/powerpc/include/asm/pci-bridge.h

@@ -140,10 +140,12 @@ struct pci_controller {
 	struct resource	io_resource;
 	struct resource mem_resources[3];
 	int global_number;		/* PCI domain number */
+
+	resource_size_t dma_window_base_cur;
+	resource_size_t dma_window_size;
+
 #ifdef CONFIG_PPC64
 	unsigned long buid;
-	unsigned long dma_window_base_cur;
-	unsigned long dma_window_size;
 
 	void *private_data;
 #endif	/* CONFIG_PPC64 */

+ 4 - 0
arch/powerpc/sysdev/fsl_pci.c

@@ -152,6 +152,10 @@ static void __init setup_pci_atmu(struct pci_controller *hose,
 	out_be32(&pci->piw[2].piwbar,0x00000000);
 	out_be32(&pci->piw[2].piwar, PIWAR_2G);
 
+	/* Save the base address and size covered by inbound window mappings */
+	hose->dma_window_base_cur = 0x00000000;
+	hose->dma_window_size = 0x80000000;
+
 	iounmap(pci);
 }