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@@ -76,6 +76,10 @@
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#define AHB_ARBITRATION_AHB_MEM_WRQUE_MST_ID 0xf8
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+#define AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE BIT(17)
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+
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+static struct platform_driver tegra_ahb_driver;
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+
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static const u32 tegra_ahb_gizmo[] = {
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AHB_ARBITRATION_DISABLE,
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AHB_ARBITRATION_PRIORITY_CTRL,
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@@ -124,6 +128,34 @@ static inline void gizmo_writel(struct tegra_ahb *ahb, u32 value, u32 offset)
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writel(value, ahb->regs + offset);
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}
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+#ifdef CONFIG_ARCH_TEGRA_3x_SOC
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+static int tegra_ahb_match_by_smmu(struct device *dev, void *data)
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+{
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+ struct tegra_ahb *ahb = dev_get_drvdata(dev);
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+ struct device_node *dn = data;
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+
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+ return (ahb->dev->of_node == dn) ? 1 : 0;
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+}
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+
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+int tegra_ahb_enable_smmu(struct device_node *dn)
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+{
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+ struct device *dev;
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+ u32 val;
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+ struct tegra_ahb *ahb;
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+
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+ dev = driver_find_device(&tegra_ahb_driver.driver, NULL, dn,
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+ tegra_ahb_match_by_smmu);
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+ if (!dev)
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+ return -EPROBE_DEFER;
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+ ahb = dev_get_drvdata(dev);
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+ val = gizmo_readl(ahb, AHB_ARBITRATION_XBAR_CTRL);
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+ val |= AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE;
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+ gizmo_writel(ahb, val, AHB_ARBITRATION_XBAR_CTRL);
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+ return 0;
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+}
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+EXPORT_SYMBOL(tegra_ahb_enable_smmu);
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+#endif
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+
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static int tegra_ahb_suspend(struct device *dev)
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{
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int i;
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