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@@ -1,7 +1,7 @@
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/*
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* Blackfin core clock scaling
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*
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- * Copyright 2008-2009 Analog Devices Inc.
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+ * Copyright 2008-2011 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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@@ -17,7 +17,7 @@
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#include <asm/dpmc.h>
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/* this is the table of CCLK frequencies, in Hz */
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-/* .index is the entry in the auxillary dpm_state_table[] */
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+/* .index is the entry in the auxiliary dpm_state_table[] */
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static struct cpufreq_frequency_table bfin_freq_table[] = {
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{
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.frequency = CPUFREQ_TABLE_END,
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@@ -44,7 +44,7 @@ static struct bfin_dpm_state {
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#if defined(CONFIG_CYCLES_CLOCKSOURCE)
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/*
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- * normalized to maximum frequncy offset for CYCLES,
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+ * normalized to maximum frequency offset for CYCLES,
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* used in time-ts cycles clock source, but could be used
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* somewhere also.
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*/
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