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@@ -134,22 +134,22 @@
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/* Register access macros */
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#define mci_readl(dev, reg) \
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- __raw_readl(dev->regs + SDMMC_##reg)
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+ __raw_readl((dev)->regs + SDMMC_##reg)
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#define mci_writel(dev, reg, value) \
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- __raw_writel((value), dev->regs + SDMMC_##reg)
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+ __raw_writel((value), (dev)->regs + SDMMC_##reg)
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/* 16-bit FIFO access macros */
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#define mci_readw(dev, reg) \
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- __raw_readw(dev->regs + SDMMC_##reg)
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+ __raw_readw((dev)->regs + SDMMC_##reg)
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#define mci_writew(dev, reg, value) \
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- __raw_writew((value), dev->regs + SDMMC_##reg)
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+ __raw_writew((value), (dev)->regs + SDMMC_##reg)
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/* 64-bit FIFO access macros */
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#ifdef readq
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#define mci_readq(dev, reg) \
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- __raw_readq(dev->regs + SDMMC_##reg)
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+ __raw_readq((dev)->regs + SDMMC_##reg)
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#define mci_writeq(dev, reg, value) \
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- __raw_writeq((value), dev->regs + SDMMC_##reg)
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+ __raw_writeq((value), (dev)->regs + SDMMC_##reg)
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#else
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/*
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* Dummy readq implementation for architectures that don't define it.
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@@ -160,9 +160,9 @@
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* rest of the code free from ifdefs.
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*/
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#define mci_readq(dev, reg) \
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- (*(volatile u64 __force *)(dev->regs + SDMMC_##reg))
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+ (*(volatile u64 __force *)((dev)->regs + SDMMC_##reg))
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#define mci_writeq(dev, reg, value) \
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- (*(volatile u64 __force *)(dev->regs + SDMMC_##reg) = value)
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+ (*(volatile u64 __force *)((dev)->regs + SDMMC_##reg) = (value))
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#endif
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#endif /* _DW_MMC_H_ */
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