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@@ -46,13 +46,7 @@
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/* TWL4030 PMBR1 Register GPIO6 mux bits */
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#define TWL4030_GPIO6_PWM0_MUTE(value) ((value & 0x03) << 2)
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-/* Shadow register used by the audio driver */
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-#define TWL4030_REG_SW_SHADOW 0x4A
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-#define TWL4030_CACHEREGNUM (TWL4030_REG_SW_SHADOW + 1)
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-
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-/* TWL4030_REG_SW_SHADOW (0x4A) Fields */
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-#define TWL4030_HFL_EN 0x01
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-#define TWL4030_HFR_EN 0x02
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+#define TWL4030_CACHEREGNUM (TWL4030_REG_MISC_SET_2 + 1)
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/*
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* twl4030 register cache & default register settings
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@@ -132,7 +126,6 @@ static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
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0x00, /* REG_VIBRA_PWM_SET (0x47) */
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0x00, /* REG_ANAMIC_GAIN (0x48) */
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0x00, /* REG_MISC_SET_2 (0x49) */
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- 0x00, /* REG_SW_SHADOW (0x4A) - Shadow, non HW register */
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};
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/* codec private data */
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@@ -198,42 +191,41 @@ static int twl4030_write(struct snd_soc_codec *codec,
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int write_to_reg = 0;
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twl4030_write_reg_cache(codec, reg, value);
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- if (likely(reg < TWL4030_REG_SW_SHADOW)) {
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- /* Decide if the given register can be written */
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- switch (reg) {
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- case TWL4030_REG_EAR_CTL:
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- if (twl4030->earpiece_enabled)
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- write_to_reg = 1;
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- break;
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- case TWL4030_REG_PREDL_CTL:
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- if (twl4030->predrivel_enabled)
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- write_to_reg = 1;
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- break;
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- case TWL4030_REG_PREDR_CTL:
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- if (twl4030->predriver_enabled)
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- write_to_reg = 1;
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- break;
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- case TWL4030_REG_PRECKL_CTL:
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- if (twl4030->carkitl_enabled)
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- write_to_reg = 1;
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- break;
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- case TWL4030_REG_PRECKR_CTL:
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- if (twl4030->carkitr_enabled)
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- write_to_reg = 1;
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- break;
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- case TWL4030_REG_HS_GAIN_SET:
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- if (twl4030->hsl_enabled || twl4030->hsr_enabled)
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- write_to_reg = 1;
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- break;
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- default:
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- /* All other register can be written */
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+ /* Decide if the given register can be written */
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+ switch (reg) {
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+ case TWL4030_REG_EAR_CTL:
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+ if (twl4030->earpiece_enabled)
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write_to_reg = 1;
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- break;
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- }
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- if (write_to_reg)
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- return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
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- value, reg);
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+ break;
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+ case TWL4030_REG_PREDL_CTL:
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+ if (twl4030->predrivel_enabled)
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+ write_to_reg = 1;
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+ break;
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+ case TWL4030_REG_PREDR_CTL:
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+ if (twl4030->predriver_enabled)
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+ write_to_reg = 1;
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+ break;
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+ case TWL4030_REG_PRECKL_CTL:
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+ if (twl4030->carkitl_enabled)
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+ write_to_reg = 1;
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+ break;
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+ case TWL4030_REG_PRECKR_CTL:
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+ if (twl4030->carkitr_enabled)
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+ write_to_reg = 1;
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+ break;
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+ case TWL4030_REG_HS_GAIN_SET:
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+ if (twl4030->hsl_enabled || twl4030->hsr_enabled)
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+ write_to_reg = 1;
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+ break;
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+ default:
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+ /* All other register can be written */
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+ write_to_reg = 1;
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+ break;
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}
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+ if (write_to_reg)
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+ return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
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+ value, reg);
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+
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return 0;
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}
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@@ -532,7 +524,7 @@ SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
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/* Handsfree Left virtual mute */
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static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
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- SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 0, 1, 0);
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+ SOC_DAPM_SINGLE_VIRT("Switch", 1);
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/* Handsfree Right */
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static const char *twl4030_handsfreer_texts[] =
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@@ -548,7 +540,7 @@ SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
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/* Handsfree Right virtual mute */
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static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
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- SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 1, 1, 0);
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+ SOC_DAPM_SINGLE_VIRT("Switch", 1);
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/* Vibra */
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/* Vibra audio path selection */
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