|
@@ -81,11 +81,11 @@ static u32 tsi148_DMA_irqhandler(struct tsi148_driver *bridge,
|
|
|
u32 serviced = 0;
|
|
|
|
|
|
if (channel_mask & TSI148_LCSR_INTS_DMA0S) {
|
|
|
- wake_up(&(bridge->dma_queue[0]));
|
|
|
+ wake_up(&bridge->dma_queue[0]);
|
|
|
serviced |= TSI148_LCSR_INTC_DMA0C;
|
|
|
}
|
|
|
if (channel_mask & TSI148_LCSR_INTS_DMA1S) {
|
|
|
- wake_up(&(bridge->dma_queue[1]));
|
|
|
+ wake_up(&bridge->dma_queue[1]);
|
|
|
serviced |= TSI148_LCSR_INTC_DMA1C;
|
|
|
}
|
|
|
|
|
@@ -191,7 +191,7 @@ static u32 tsi148_VERR_irqhandler(struct vme_bridge *tsi148_bridge)
|
|
|
if (error) {
|
|
|
error->address = error_addr;
|
|
|
error->attributes = error_attrib;
|
|
|
- list_add_tail(&(error->list), &(tsi148_bridge->vme_errors));
|
|
|
+ list_add_tail(&error->list, &tsi148_bridge->vme_errors);
|
|
|
} else {
|
|
|
dev_err(tsi148_bridge->parent, "Unable to alloc memory for "
|
|
|
"VMEbus Error reporting\n");
|
|
@@ -210,7 +210,7 @@ static u32 tsi148_VERR_irqhandler(struct vme_bridge *tsi148_bridge)
|
|
|
*/
|
|
|
static u32 tsi148_IACK_irqhandler(struct tsi148_driver *bridge)
|
|
|
{
|
|
|
- wake_up(&(bridge->iack_queue));
|
|
|
+ wake_up(&bridge->iack_queue);
|
|
|
|
|
|
return TSI148_LCSR_INTC_IACKC;
|
|
|
}
|
|
@@ -320,9 +320,9 @@ static int tsi148_irq_init(struct vme_bridge *tsi148_bridge)
|
|
|
bridge = tsi148_bridge->driver_priv;
|
|
|
|
|
|
/* Initialise list for VME bus errors */
|
|
|
- INIT_LIST_HEAD(&(tsi148_bridge->vme_errors));
|
|
|
+ INIT_LIST_HEAD(&tsi148_bridge->vme_errors);
|
|
|
|
|
|
- mutex_init(&(tsi148_bridge->irq_mtx));
|
|
|
+ mutex_init(&tsi148_bridge->irq_mtx);
|
|
|
|
|
|
result = request_irq(pdev->irq,
|
|
|
tsi148_irqhandler,
|
|
@@ -452,7 +452,7 @@ int tsi148_irq_generate(struct vme_bridge *tsi148_bridge, int level, int statid)
|
|
|
|
|
|
bridge = tsi148_bridge->driver_priv;
|
|
|
|
|
|
- mutex_lock(&(bridge->vme_int));
|
|
|
+ mutex_lock(&bridge->vme_int);
|
|
|
|
|
|
/* Read VICR register */
|
|
|
tmp = ioread32be(bridge->base + TSI148_LCSR_VICR);
|
|
@@ -470,7 +470,7 @@ int tsi148_irq_generate(struct vme_bridge *tsi148_bridge, int level, int statid)
|
|
|
wait_event_interruptible(bridge->iack_queue,
|
|
|
tsi148_iack_received(bridge));
|
|
|
|
|
|
- mutex_unlock(&(bridge->vme_int));
|
|
|
+ mutex_unlock(&bridge->vme_int);
|
|
|
|
|
|
return 0;
|
|
|
}
|
|
@@ -496,7 +496,7 @@ static struct vme_bus_error *tsi148_find_error(struct vme_bridge *tsi148_bridge,
|
|
|
*/
|
|
|
err_pos = NULL;
|
|
|
/* Iterate through errors */
|
|
|
- list_for_each(err_pos, &(tsi148_bridge->vme_errors)) {
|
|
|
+ list_for_each(err_pos, &tsi148_bridge->vme_errors) {
|
|
|
vme_err = list_entry(err_pos, struct vme_bus_error, list);
|
|
|
if ((vme_err->address >= address) &&
|
|
|
(vme_err->address < bound)) {
|
|
@@ -530,7 +530,7 @@ static void tsi148_clear_errors(struct vme_bridge *tsi148_bridge,
|
|
|
*/
|
|
|
err_pos = NULL;
|
|
|
/* Iterate through errors */
|
|
|
- list_for_each_safe(err_pos, temp, &(tsi148_bridge->vme_errors)) {
|
|
|
+ list_for_each_safe(err_pos, temp, &tsi148_bridge->vme_errors) {
|
|
|
vme_err = list_entry(err_pos, struct vme_bus_error, list);
|
|
|
|
|
|
if ((vme_err->address >= address) &&
|
|
@@ -819,8 +819,8 @@ static int tsi148_alloc_resource(struct vme_master_resource *image,
|
|
|
image->kern_base = NULL;
|
|
|
if (image->bus_resource.name != NULL)
|
|
|
kfree(image->bus_resource.name);
|
|
|
- release_resource(&(image->bus_resource));
|
|
|
- memset(&(image->bus_resource), 0, sizeof(struct resource));
|
|
|
+ release_resource(&image->bus_resource);
|
|
|
+ memset(&image->bus_resource, 0, sizeof(struct resource));
|
|
|
}
|
|
|
|
|
|
/* Exit here if size is zero */
|
|
@@ -845,7 +845,7 @@ static int tsi148_alloc_resource(struct vme_master_resource *image,
|
|
|
image->bus_resource.flags = IORESOURCE_MEM;
|
|
|
|
|
|
retval = pci_bus_alloc_resource(pdev->bus,
|
|
|
- &(image->bus_resource), size, size, PCIBIOS_MIN_MEM,
|
|
|
+ &image->bus_resource, size, size, PCIBIOS_MIN_MEM,
|
|
|
0, NULL, NULL);
|
|
|
if (retval) {
|
|
|
dev_err(tsi148_bridge->parent, "Failed to allocate mem "
|
|
@@ -868,10 +868,10 @@ static int tsi148_alloc_resource(struct vme_master_resource *image,
|
|
|
iounmap(image->kern_base);
|
|
|
image->kern_base = NULL;
|
|
|
err_remap:
|
|
|
- release_resource(&(image->bus_resource));
|
|
|
+ release_resource(&image->bus_resource);
|
|
|
err_resource:
|
|
|
kfree(image->bus_resource.name);
|
|
|
- memset(&(image->bus_resource), 0, sizeof(struct resource));
|
|
|
+ memset(&image->bus_resource, 0, sizeof(struct resource));
|
|
|
err_name:
|
|
|
return retval;
|
|
|
}
|
|
@@ -883,9 +883,9 @@ static void tsi148_free_resource(struct vme_master_resource *image)
|
|
|
{
|
|
|
iounmap(image->kern_base);
|
|
|
image->kern_base = NULL;
|
|
|
- release_resource(&(image->bus_resource));
|
|
|
+ release_resource(&image->bus_resource);
|
|
|
kfree(image->bus_resource.name);
|
|
|
- memset(&(image->bus_resource), 0, sizeof(struct resource));
|
|
|
+ memset(&image->bus_resource, 0, sizeof(struct resource));
|
|
|
}
|
|
|
|
|
|
/*
|
|
@@ -924,7 +924,7 @@ int tsi148_master_set(struct vme_master_resource *image, int enabled,
|
|
|
goto err_window;
|
|
|
}
|
|
|
|
|
|
- spin_lock(&(image->lock));
|
|
|
+ spin_lock(&image->lock);
|
|
|
|
|
|
/* Let's allocate the resource here rather than further up the stack as
|
|
|
* it avoids pushing loads of bus dependant stuff up the stack. If size
|
|
@@ -932,7 +932,7 @@ int tsi148_master_set(struct vme_master_resource *image, int enabled,
|
|
|
*/
|
|
|
retval = tsi148_alloc_resource(image, size);
|
|
|
if (retval) {
|
|
|
- spin_unlock(&(image->lock));
|
|
|
+ spin_unlock(&image->lock);
|
|
|
dev_err(tsi148_bridge->parent, "Unable to allocate memory for "
|
|
|
"resource\n");
|
|
|
goto err_res;
|
|
@@ -959,19 +959,19 @@ int tsi148_master_set(struct vme_master_resource *image, int enabled,
|
|
|
reg_split(vme_offset, &vme_offset_high, &vme_offset_low);
|
|
|
|
|
|
if (pci_base_low & 0xFFFF) {
|
|
|
- spin_unlock(&(image->lock));
|
|
|
+ spin_unlock(&image->lock);
|
|
|
dev_err(tsi148_bridge->parent, "Invalid PCI base alignment\n");
|
|
|
retval = -EINVAL;
|
|
|
goto err_gran;
|
|
|
}
|
|
|
if (pci_bound_low & 0xFFFF) {
|
|
|
- spin_unlock(&(image->lock));
|
|
|
+ spin_unlock(&image->lock);
|
|
|
dev_err(tsi148_bridge->parent, "Invalid PCI bound alignment\n");
|
|
|
retval = -EINVAL;
|
|
|
goto err_gran;
|
|
|
}
|
|
|
if (vme_offset_low & 0xFFFF) {
|
|
|
- spin_unlock(&(image->lock));
|
|
|
+ spin_unlock(&image->lock);
|
|
|
dev_err(tsi148_bridge->parent, "Invalid VME Offset "
|
|
|
"alignment\n");
|
|
|
retval = -EINVAL;
|
|
@@ -1035,7 +1035,7 @@ int tsi148_master_set(struct vme_master_resource *image, int enabled,
|
|
|
temp_ctl |= TSI148_LCSR_OTAT_DBW_32;
|
|
|
break;
|
|
|
default:
|
|
|
- spin_unlock(&(image->lock));
|
|
|
+ spin_unlock(&image->lock);
|
|
|
dev_err(tsi148_bridge->parent, "Invalid data width\n");
|
|
|
retval = -EINVAL;
|
|
|
goto err_dwidth;
|
|
@@ -1072,7 +1072,7 @@ int tsi148_master_set(struct vme_master_resource *image, int enabled,
|
|
|
temp_ctl |= TSI148_LCSR_OTAT_AMODE_USER4;
|
|
|
break;
|
|
|
default:
|
|
|
- spin_unlock(&(image->lock));
|
|
|
+ spin_unlock(&image->lock);
|
|
|
dev_err(tsi148_bridge->parent, "Invalid address space\n");
|
|
|
retval = -EINVAL;
|
|
|
goto err_aspace;
|
|
@@ -1109,7 +1109,7 @@ int tsi148_master_set(struct vme_master_resource *image, int enabled,
|
|
|
iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_OT[i] +
|
|
|
TSI148_LCSR_OFFSET_OTAT);
|
|
|
|
|
|
- spin_unlock(&(image->lock));
|
|
|
+ spin_unlock(&image->lock);
|
|
|
return 0;
|
|
|
|
|
|
err_aspace:
|
|
@@ -1243,12 +1243,12 @@ int tsi148_master_get(struct vme_master_resource *image, int *enabled,
|
|
|
{
|
|
|
int retval;
|
|
|
|
|
|
- spin_lock(&(image->lock));
|
|
|
+ spin_lock(&image->lock);
|
|
|
|
|
|
retval = __tsi148_master_get(image, enabled, vme_base, size, aspace,
|
|
|
cycle, dwidth);
|
|
|
|
|
|
- spin_unlock(&(image->lock));
|
|
|
+ spin_unlock(&image->lock);
|
|
|
|
|
|
return retval;
|
|
|
}
|
|
@@ -1266,7 +1266,7 @@ ssize_t tsi148_master_read(struct vme_master_resource *image, void *buf,
|
|
|
|
|
|
tsi148_bridge = image->parent;
|
|
|
|
|
|
- spin_lock(&(image->lock));
|
|
|
+ spin_lock(&image->lock);
|
|
|
|
|
|
memcpy_fromio(buf, image->kern_base + offset, (unsigned int)count);
|
|
|
retval = count;
|
|
@@ -1289,7 +1289,7 @@ ssize_t tsi148_master_read(struct vme_master_resource *image, void *buf,
|
|
|
}
|
|
|
|
|
|
skip_chk:
|
|
|
- spin_unlock(&(image->lock));
|
|
|
+ spin_unlock(&image->lock);
|
|
|
|
|
|
return retval;
|
|
|
}
|
|
@@ -1312,7 +1312,7 @@ ssize_t tsi148_master_write(struct vme_master_resource *image, void *buf,
|
|
|
|
|
|
bridge = tsi148_bridge->driver_priv;
|
|
|
|
|
|
- spin_lock(&(image->lock));
|
|
|
+ spin_lock(&image->lock);
|
|
|
|
|
|
memcpy_toio(image->kern_base + offset, buf, (unsigned int)count);
|
|
|
retval = count;
|
|
@@ -1352,7 +1352,7 @@ ssize_t tsi148_master_write(struct vme_master_resource *image, void *buf,
|
|
|
}
|
|
|
|
|
|
skip_chk:
|
|
|
- spin_unlock(&(image->lock));
|
|
|
+ spin_unlock(&image->lock);
|
|
|
|
|
|
return retval;
|
|
|
}
|
|
@@ -1378,10 +1378,10 @@ unsigned int tsi148_master_rmw(struct vme_master_resource *image,
|
|
|
i = image->number;
|
|
|
|
|
|
/* Locking as we can only do one of these at a time */
|
|
|
- mutex_lock(&(bridge->vme_rmw));
|
|
|
+ mutex_lock(&bridge->vme_rmw);
|
|
|
|
|
|
/* Lock image */
|
|
|
- spin_lock(&(image->lock));
|
|
|
+ spin_lock(&image->lock);
|
|
|
|
|
|
pci_addr_high = ioread32be(bridge->base + TSI148_LCSR_OT[i] +
|
|
|
TSI148_LCSR_OFFSET_OTSAU);
|
|
@@ -1411,9 +1411,9 @@ unsigned int tsi148_master_rmw(struct vme_master_resource *image,
|
|
|
tmp &= ~TSI148_LCSR_VMCTRL_RMWEN;
|
|
|
iowrite32be(tmp, bridge->base + TSI148_LCSR_VMCTRL);
|
|
|
|
|
|
- spin_unlock(&(image->lock));
|
|
|
+ spin_unlock(&image->lock);
|
|
|
|
|
|
- mutex_unlock(&(bridge->vme_rmw));
|
|
|
+ mutex_unlock(&bridge->vme_rmw);
|
|
|
|
|
|
return result;
|
|
|
}
|
|
@@ -1633,10 +1633,10 @@ int tsi148_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
|
|
|
}
|
|
|
|
|
|
/* Test descriptor alignment */
|
|
|
- if ((unsigned long)&(entry->descriptor) & 0x7) {
|
|
|
+ if ((unsigned long)&entry->descriptor & 0x7) {
|
|
|
dev_err(tsi148_bridge->parent, "Descriptor not aligned to 8 "
|
|
|
"byte boundary as required: %p\n",
|
|
|
- &(entry->descriptor));
|
|
|
+ &entry->descriptor);
|
|
|
retval = -EINVAL;
|
|
|
goto err_align;
|
|
|
}
|
|
@@ -1644,7 +1644,7 @@ int tsi148_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
|
|
|
/* Given we are going to fill out the structure, we probably don't
|
|
|
* need to zero it, but better safe than sorry for now.
|
|
|
*/
|
|
|
- memset(&(entry->descriptor), 0, sizeof(struct tsi148_dma_descriptor));
|
|
|
+ memset(&entry->descriptor, 0, sizeof(struct tsi148_dma_descriptor));
|
|
|
|
|
|
/* Fill out source part */
|
|
|
switch (src->type) {
|
|
@@ -1681,7 +1681,7 @@ int tsi148_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
|
|
|
entry->descriptor.dsat = TSI148_LCSR_DSAT_TYP_VME;
|
|
|
|
|
|
retval = tsi148_dma_set_vme_src_attributes(
|
|
|
- tsi148_bridge->parent, &(entry->descriptor.dsat),
|
|
|
+ tsi148_bridge->parent, &entry->descriptor.dsat,
|
|
|
vme_attr->aspace, vme_attr->cycle, vme_attr->dwidth);
|
|
|
if (retval < 0)
|
|
|
goto err_source;
|
|
@@ -1719,7 +1719,7 @@ int tsi148_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
|
|
|
entry->descriptor.ddat = TSI148_LCSR_DDAT_TYP_VME;
|
|
|
|
|
|
retval = tsi148_dma_set_vme_dest_attributes(
|
|
|
- tsi148_bridge->parent, &(entry->descriptor.ddat),
|
|
|
+ tsi148_bridge->parent, &entry->descriptor.ddat,
|
|
|
vme_attr->aspace, vme_attr->cycle, vme_attr->dwidth);
|
|
|
if (retval < 0)
|
|
|
goto err_dest;
|
|
@@ -1735,16 +1735,16 @@ int tsi148_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
|
|
|
entry->descriptor.dcnt = (u32)count;
|
|
|
|
|
|
/* Add to list */
|
|
|
- list_add_tail(&(entry->list), &(list->entries));
|
|
|
+ list_add_tail(&entry->list, &list->entries);
|
|
|
|
|
|
/* Fill out previous descriptors "Next Address" */
|
|
|
- if (entry->list.prev != &(list->entries)) {
|
|
|
+ if (entry->list.prev != &list->entries) {
|
|
|
prev = list_entry(entry->list.prev, struct tsi148_dma_entry,
|
|
|
list);
|
|
|
/* We need the bus address for the pointer */
|
|
|
- desc_ptr = virt_to_bus(&(entry->descriptor));
|
|
|
- reg_split(desc_ptr, &(prev->descriptor.dnlau),
|
|
|
- &(prev->descriptor.dnlal));
|
|
|
+ desc_ptr = virt_to_bus(&entry->descriptor);
|
|
|
+ reg_split(desc_ptr, &prev->descriptor.dnlau,
|
|
|
+ &prev->descriptor.dnlal);
|
|
|
}
|
|
|
|
|
|
return 0;
|
|
@@ -1799,30 +1799,30 @@ int tsi148_dma_list_exec(struct vme_dma_list *list)
|
|
|
|
|
|
bridge = tsi148_bridge->driver_priv;
|
|
|
|
|
|
- mutex_lock(&(ctrlr->mtx));
|
|
|
+ mutex_lock(&ctrlr->mtx);
|
|
|
|
|
|
channel = ctrlr->number;
|
|
|
|
|
|
- if (!list_empty(&(ctrlr->running))) {
|
|
|
+ if (!list_empty(&ctrlr->running)) {
|
|
|
/*
|
|
|
* XXX We have an active DMA transfer and currently haven't
|
|
|
* sorted out the mechanism for "pending" DMA transfers.
|
|
|
* Return busy.
|
|
|
*/
|
|
|
/* Need to add to pending here */
|
|
|
- mutex_unlock(&(ctrlr->mtx));
|
|
|
+ mutex_unlock(&ctrlr->mtx);
|
|
|
return -EBUSY;
|
|
|
} else {
|
|
|
- list_add(&(list->list), &(ctrlr->running));
|
|
|
+ list_add(&list->list, &ctrlr->running);
|
|
|
}
|
|
|
|
|
|
/* Get first bus address and write into registers */
|
|
|
- entry = list_first_entry(&(list->entries), struct tsi148_dma_entry,
|
|
|
+ entry = list_first_entry(&list->entries, struct tsi148_dma_entry,
|
|
|
list);
|
|
|
|
|
|
- bus_addr = virt_to_bus(&(entry->descriptor));
|
|
|
+ bus_addr = virt_to_bus(&entry->descriptor);
|
|
|
|
|
|
- mutex_unlock(&(ctrlr->mtx));
|
|
|
+ mutex_unlock(&ctrlr->mtx);
|
|
|
|
|
|
reg_split(bus_addr, &bus_addr_high, &bus_addr_low);
|
|
|
|
|
@@ -1850,9 +1850,9 @@ int tsi148_dma_list_exec(struct vme_dma_list *list)
|
|
|
}
|
|
|
|
|
|
/* Remove list from running list */
|
|
|
- mutex_lock(&(ctrlr->mtx));
|
|
|
- list_del(&(list->list));
|
|
|
- mutex_unlock(&(ctrlr->mtx));
|
|
|
+ mutex_lock(&ctrlr->mtx);
|
|
|
+ list_del(&list->list);
|
|
|
+ mutex_unlock(&ctrlr->mtx);
|
|
|
|
|
|
return retval;
|
|
|
}
|
|
@@ -1868,7 +1868,7 @@ int tsi148_dma_list_empty(struct vme_dma_list *list)
|
|
|
struct tsi148_dma_entry *entry;
|
|
|
|
|
|
/* detach and free each entry */
|
|
|
- list_for_each_safe(pos, temp, &(list->entries)) {
|
|
|
+ list_for_each_safe(pos, temp, &list->entries) {
|
|
|
list_del(pos);
|
|
|
entry = list_entry(pos, struct tsi148_dma_entry, list);
|
|
|
kfree(entry);
|
|
@@ -1896,12 +1896,12 @@ int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base,
|
|
|
|
|
|
bridge = tsi148_bridge->driver_priv;
|
|
|
|
|
|
- mutex_lock(&(lm->mtx));
|
|
|
+ mutex_lock(&lm->mtx);
|
|
|
|
|
|
/* If we already have a callback attached, we can't move it! */
|
|
|
for (i = 0; i < lm->monitors; i++) {
|
|
|
if (bridge->lm_callback[i] != NULL) {
|
|
|
- mutex_unlock(&(lm->mtx));
|
|
|
+ mutex_unlock(&lm->mtx);
|
|
|
dev_err(tsi148_bridge->parent, "Location monitor "
|
|
|
"callback attached, can't reset\n");
|
|
|
return -EBUSY;
|
|
@@ -1922,7 +1922,7 @@ int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base,
|
|
|
lm_ctl |= TSI148_LCSR_LMAT_AS_A64;
|
|
|
break;
|
|
|
default:
|
|
|
- mutex_unlock(&(lm->mtx));
|
|
|
+ mutex_unlock(&lm->mtx);
|
|
|
dev_err(tsi148_bridge->parent, "Invalid address space\n");
|
|
|
return -EINVAL;
|
|
|
break;
|
|
@@ -1943,7 +1943,7 @@ int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base,
|
|
|
iowrite32be(lm_base_low, bridge->base + TSI148_LCSR_LMBAL);
|
|
|
iowrite32be(lm_ctl, bridge->base + TSI148_LCSR_LMAT);
|
|
|
|
|
|
- mutex_unlock(&(lm->mtx));
|
|
|
+ mutex_unlock(&lm->mtx);
|
|
|
|
|
|
return 0;
|
|
|
}
|
|
@@ -1959,7 +1959,7 @@ int tsi148_lm_get(struct vme_lm_resource *lm, unsigned long long *lm_base,
|
|
|
|
|
|
bridge = lm->parent->driver_priv;
|
|
|
|
|
|
- mutex_lock(&(lm->mtx));
|
|
|
+ mutex_lock(&lm->mtx);
|
|
|
|
|
|
lm_base_high = ioread32be(bridge->base + TSI148_LCSR_LMBAU);
|
|
|
lm_base_low = ioread32be(bridge->base + TSI148_LCSR_LMBAL);
|
|
@@ -1992,7 +1992,7 @@ int tsi148_lm_get(struct vme_lm_resource *lm, unsigned long long *lm_base,
|
|
|
if (lm_ctl & TSI148_LCSR_LMAT_DATA)
|
|
|
*cycle |= VME_DATA;
|
|
|
|
|
|
- mutex_unlock(&(lm->mtx));
|
|
|
+ mutex_unlock(&lm->mtx);
|
|
|
|
|
|
return enabled;
|
|
|
}
|
|
@@ -2013,12 +2013,12 @@ int tsi148_lm_attach(struct vme_lm_resource *lm, int monitor,
|
|
|
|
|
|
bridge = tsi148_bridge->driver_priv;
|
|
|
|
|
|
- mutex_lock(&(lm->mtx));
|
|
|
+ mutex_lock(&lm->mtx);
|
|
|
|
|
|
/* Ensure that the location monitor is configured - need PGM or DATA */
|
|
|
lm_ctl = ioread32be(bridge->base + TSI148_LCSR_LMAT);
|
|
|
if ((lm_ctl & (TSI148_LCSR_LMAT_PGM | TSI148_LCSR_LMAT_DATA)) == 0) {
|
|
|
- mutex_unlock(&(lm->mtx));
|
|
|
+ mutex_unlock(&lm->mtx);
|
|
|
dev_err(tsi148_bridge->parent, "Location monitor not properly "
|
|
|
"configured\n");
|
|
|
return -EINVAL;
|
|
@@ -2026,7 +2026,7 @@ int tsi148_lm_attach(struct vme_lm_resource *lm, int monitor,
|
|
|
|
|
|
/* Check that a callback isn't already attached */
|
|
|
if (bridge->lm_callback[monitor] != NULL) {
|
|
|
- mutex_unlock(&(lm->mtx));
|
|
|
+ mutex_unlock(&lm->mtx);
|
|
|
dev_err(tsi148_bridge->parent, "Existing callback attached\n");
|
|
|
return -EBUSY;
|
|
|
}
|
|
@@ -2049,7 +2049,7 @@ int tsi148_lm_attach(struct vme_lm_resource *lm, int monitor,
|
|
|
iowrite32be(lm_ctl, bridge->base + TSI148_LCSR_LMAT);
|
|
|
}
|
|
|
|
|
|
- mutex_unlock(&(lm->mtx));
|
|
|
+ mutex_unlock(&lm->mtx);
|
|
|
|
|
|
return 0;
|
|
|
}
|
|
@@ -2064,7 +2064,7 @@ int tsi148_lm_detach(struct vme_lm_resource *lm, int monitor)
|
|
|
|
|
|
bridge = lm->parent->driver_priv;
|
|
|
|
|
|
- mutex_lock(&(lm->mtx));
|
|
|
+ mutex_lock(&lm->mtx);
|
|
|
|
|
|
/* Disable Location Monitor and ensure previous interrupts are clear */
|
|
|
lm_en = ioread32be(bridge->base + TSI148_LCSR_INTEN);
|
|
@@ -2089,7 +2089,7 @@ int tsi148_lm_detach(struct vme_lm_resource *lm, int monitor)
|
|
|
iowrite32be(tmp, bridge->base + TSI148_LCSR_LMAT);
|
|
|
}
|
|
|
|
|
|
- mutex_unlock(&(lm->mtx));
|
|
|
+ mutex_unlock(&lm->mtx);
|
|
|
|
|
|
return 0;
|
|
|
}
|
|
@@ -2142,7 +2142,7 @@ static int tsi148_crcsr_init(struct vme_bridge *tsi148_bridge,
|
|
|
|
|
|
/* Allocate mem for CR/CSR image */
|
|
|
bridge->crcsr_kernel = pci_alloc_consistent(pdev, VME_CRCSR_BUF_SIZE,
|
|
|
- &(bridge->crcsr_bus));
|
|
|
+ &bridge->crcsr_bus);
|
|
|
if (bridge->crcsr_kernel == NULL) {
|
|
|
dev_err(tsi148_bridge->parent, "Failed to allocate memory for "
|
|
|
"CR/CSR image\n");
|
|
@@ -2280,13 +2280,13 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
}
|
|
|
|
|
|
/* Initialize wait queues & mutual exclusion flags */
|
|
|
- init_waitqueue_head(&(tsi148_device->dma_queue[0]));
|
|
|
- init_waitqueue_head(&(tsi148_device->dma_queue[1]));
|
|
|
- init_waitqueue_head(&(tsi148_device->iack_queue));
|
|
|
- mutex_init(&(tsi148_device->vme_int));
|
|
|
- mutex_init(&(tsi148_device->vme_rmw));
|
|
|
+ init_waitqueue_head(&tsi148_device->dma_queue[0]);
|
|
|
+ init_waitqueue_head(&tsi148_device->dma_queue[1]);
|
|
|
+ init_waitqueue_head(&tsi148_device->iack_queue);
|
|
|
+ mutex_init(&tsi148_device->vme_int);
|
|
|
+ mutex_init(&tsi148_device->vme_rmw);
|
|
|
|
|
|
- tsi148_bridge->parent = &(pdev->dev);
|
|
|
+ tsi148_bridge->parent = &pdev->dev;
|
|
|
strcpy(tsi148_bridge->name, driver_name);
|
|
|
|
|
|
/* Setup IRQ */
|
|
@@ -2314,7 +2314,7 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
goto err_master;
|
|
|
}
|
|
|
tsi148_device->flush_image->parent = tsi148_bridge;
|
|
|
- spin_lock_init(&(tsi148_device->flush_image->lock));
|
|
|
+ spin_lock_init(&tsi148_device->flush_image->lock);
|
|
|
tsi148_device->flush_image->locked = 1;
|
|
|
tsi148_device->flush_image->number = master_num;
|
|
|
tsi148_device->flush_image->address_attr = VME_A16 | VME_A24 |
|
|
@@ -2324,13 +2324,13 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
VME_2eSST160 | VME_2eSST267 | VME_2eSST320 | VME_SUPER |
|
|
|
VME_USER | VME_PROG | VME_DATA;
|
|
|
tsi148_device->flush_image->width_attr = VME_D16 | VME_D32;
|
|
|
- memset(&(tsi148_device->flush_image->bus_resource), 0,
|
|
|
+ memset(&tsi148_device->flush_image->bus_resource, 0,
|
|
|
sizeof(struct resource));
|
|
|
tsi148_device->flush_image->kern_base = NULL;
|
|
|
}
|
|
|
|
|
|
/* Add master windows to list */
|
|
|
- INIT_LIST_HEAD(&(tsi148_bridge->master_resources));
|
|
|
+ INIT_LIST_HEAD(&tsi148_bridge->master_resources);
|
|
|
for (i = 0; i < master_num; i++) {
|
|
|
master_image = kmalloc(sizeof(struct vme_master_resource),
|
|
|
GFP_KERNEL);
|
|
@@ -2341,7 +2341,7 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
goto err_master;
|
|
|
}
|
|
|
master_image->parent = tsi148_bridge;
|
|
|
- spin_lock_init(&(master_image->lock));
|
|
|
+ spin_lock_init(&master_image->lock);
|
|
|
master_image->locked = 0;
|
|
|
master_image->number = i;
|
|
|
master_image->address_attr = VME_A16 | VME_A24 | VME_A32 |
|
|
@@ -2351,15 +2351,15 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
VME_2eSST267 | VME_2eSST320 | VME_SUPER | VME_USER |
|
|
|
VME_PROG | VME_DATA;
|
|
|
master_image->width_attr = VME_D16 | VME_D32;
|
|
|
- memset(&(master_image->bus_resource), 0,
|
|
|
+ memset(&master_image->bus_resource, 0,
|
|
|
sizeof(struct resource));
|
|
|
master_image->kern_base = NULL;
|
|
|
- list_add_tail(&(master_image->list),
|
|
|
- &(tsi148_bridge->master_resources));
|
|
|
+ list_add_tail(&master_image->list,
|
|
|
+ &tsi148_bridge->master_resources);
|
|
|
}
|
|
|
|
|
|
/* Add slave windows to list */
|
|
|
- INIT_LIST_HEAD(&(tsi148_bridge->slave_resources));
|
|
|
+ INIT_LIST_HEAD(&tsi148_bridge->slave_resources);
|
|
|
for (i = 0; i < TSI148_MAX_SLAVE; i++) {
|
|
|
slave_image = kmalloc(sizeof(struct vme_slave_resource),
|
|
|
GFP_KERNEL);
|
|
@@ -2370,7 +2370,7 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
goto err_slave;
|
|
|
}
|
|
|
slave_image->parent = tsi148_bridge;
|
|
|
- mutex_init(&(slave_image->mtx));
|
|
|
+ mutex_init(&slave_image->mtx);
|
|
|
slave_image->locked = 0;
|
|
|
slave_image->number = i;
|
|
|
slave_image->address_attr = VME_A16 | VME_A24 | VME_A32 |
|
|
@@ -2380,12 +2380,12 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
VME_2eVME | VME_2eSST | VME_2eSSTB | VME_2eSST160 |
|
|
|
VME_2eSST267 | VME_2eSST320 | VME_SUPER | VME_USER |
|
|
|
VME_PROG | VME_DATA;
|
|
|
- list_add_tail(&(slave_image->list),
|
|
|
- &(tsi148_bridge->slave_resources));
|
|
|
+ list_add_tail(&slave_image->list,
|
|
|
+ &tsi148_bridge->slave_resources);
|
|
|
}
|
|
|
|
|
|
/* Add dma engines to list */
|
|
|
- INIT_LIST_HEAD(&(tsi148_bridge->dma_resources));
|
|
|
+ INIT_LIST_HEAD(&tsi148_bridge->dma_resources);
|
|
|
for (i = 0; i < TSI148_MAX_DMA; i++) {
|
|
|
dma_ctrlr = kmalloc(sizeof(struct vme_dma_resource),
|
|
|
GFP_KERNEL);
|
|
@@ -2396,21 +2396,21 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
goto err_dma;
|
|
|
}
|
|
|
dma_ctrlr->parent = tsi148_bridge;
|
|
|
- mutex_init(&(dma_ctrlr->mtx));
|
|
|
+ mutex_init(&dma_ctrlr->mtx);
|
|
|
dma_ctrlr->locked = 0;
|
|
|
dma_ctrlr->number = i;
|
|
|
dma_ctrlr->route_attr = VME_DMA_VME_TO_MEM |
|
|
|
VME_DMA_MEM_TO_VME | VME_DMA_VME_TO_VME |
|
|
|
VME_DMA_MEM_TO_MEM | VME_DMA_PATTERN_TO_VME |
|
|
|
VME_DMA_PATTERN_TO_MEM;
|
|
|
- INIT_LIST_HEAD(&(dma_ctrlr->pending));
|
|
|
- INIT_LIST_HEAD(&(dma_ctrlr->running));
|
|
|
- list_add_tail(&(dma_ctrlr->list),
|
|
|
- &(tsi148_bridge->dma_resources));
|
|
|
+ INIT_LIST_HEAD(&dma_ctrlr->pending);
|
|
|
+ INIT_LIST_HEAD(&dma_ctrlr->running);
|
|
|
+ list_add_tail(&dma_ctrlr->list,
|
|
|
+ &tsi148_bridge->dma_resources);
|
|
|
}
|
|
|
|
|
|
/* Add location monitor to list */
|
|
|
- INIT_LIST_HEAD(&(tsi148_bridge->lm_resources));
|
|
|
+ INIT_LIST_HEAD(&tsi148_bridge->lm_resources);
|
|
|
lm = kmalloc(sizeof(struct vme_lm_resource), GFP_KERNEL);
|
|
|
if (lm == NULL) {
|
|
|
dev_err(&pdev->dev, "Failed to allocate memory for "
|
|
@@ -2419,11 +2419,11 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
goto err_lm;
|
|
|
}
|
|
|
lm->parent = tsi148_bridge;
|
|
|
- mutex_init(&(lm->mtx));
|
|
|
+ mutex_init(&lm->mtx);
|
|
|
lm->locked = 0;
|
|
|
lm->number = 1;
|
|
|
lm->monitors = 4;
|
|
|
- list_add_tail(&(lm->list), &(tsi148_bridge->lm_resources));
|
|
|
+ list_add_tail(&lm->list, &tsi148_bridge->lm_resources);
|
|
|
|
|
|
tsi148_bridge->slave_get = tsi148_slave_get;
|
|
|
tsi148_bridge->slave_set = tsi148_slave_set;
|
|
@@ -2483,28 +2483,28 @@ err_reg:
|
|
|
err_crcsr:
|
|
|
err_lm:
|
|
|
/* resources are stored in link list */
|
|
|
- list_for_each(pos, &(tsi148_bridge->lm_resources)) {
|
|
|
+ list_for_each(pos, &tsi148_bridge->lm_resources) {
|
|
|
lm = list_entry(pos, struct vme_lm_resource, list);
|
|
|
list_del(pos);
|
|
|
kfree(lm);
|
|
|
}
|
|
|
err_dma:
|
|
|
/* resources are stored in link list */
|
|
|
- list_for_each(pos, &(tsi148_bridge->dma_resources)) {
|
|
|
+ list_for_each(pos, &tsi148_bridge->dma_resources) {
|
|
|
dma_ctrlr = list_entry(pos, struct vme_dma_resource, list);
|
|
|
list_del(pos);
|
|
|
kfree(dma_ctrlr);
|
|
|
}
|
|
|
err_slave:
|
|
|
/* resources are stored in link list */
|
|
|
- list_for_each(pos, &(tsi148_bridge->slave_resources)) {
|
|
|
+ list_for_each(pos, &tsi148_bridge->slave_resources) {
|
|
|
slave_image = list_entry(pos, struct vme_slave_resource, list);
|
|
|
list_del(pos);
|
|
|
kfree(slave_image);
|
|
|
}
|
|
|
err_master:
|
|
|
/* resources are stored in link list */
|
|
|
- list_for_each(pos, &(tsi148_bridge->master_resources)) {
|
|
|
+ list_for_each(pos, &tsi148_bridge->master_resources) {
|
|
|
master_image = list_entry(pos, struct vme_master_resource,
|
|
|
list);
|
|
|
list_del(pos);
|
|
@@ -2589,21 +2589,21 @@ static void tsi148_remove(struct pci_dev *pdev)
|
|
|
tsi148_crcsr_exit(tsi148_bridge, pdev);
|
|
|
|
|
|
/* resources are stored in link list */
|
|
|
- list_for_each(pos, &(tsi148_bridge->dma_resources)) {
|
|
|
+ list_for_each(pos, &tsi148_bridge->dma_resources) {
|
|
|
dma_ctrlr = list_entry(pos, struct vme_dma_resource, list);
|
|
|
list_del(pos);
|
|
|
kfree(dma_ctrlr);
|
|
|
}
|
|
|
|
|
|
/* resources are stored in link list */
|
|
|
- list_for_each(pos, &(tsi148_bridge->slave_resources)) {
|
|
|
+ list_for_each(pos, &tsi148_bridge->slave_resources) {
|
|
|
slave_image = list_entry(pos, struct vme_slave_resource, list);
|
|
|
list_del(pos);
|
|
|
kfree(slave_image);
|
|
|
}
|
|
|
|
|
|
/* resources are stored in link list */
|
|
|
- list_for_each(pos, &(tsi148_bridge->master_resources)) {
|
|
|
+ list_for_each(pos, &tsi148_bridge->master_resources) {
|
|
|
master_image = list_entry(pos, struct vme_master_resource,
|
|
|
list);
|
|
|
list_del(pos);
|