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@@ -32,6 +32,7 @@
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#define PMCCR1_NEXT_STATE 0x0C /* Next state for power management */
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#define PMCCR1_NEXT_STATE_SHIFT 2
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#define PMCCR1_CURR_STATE 0x03 /* Current state for power management*/
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+#define IMMR_SYSCR_OFFSET 0x100
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#define IMMR_RCW_OFFSET 0x900
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#define RCW_PCI_HOST 0x80000000
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@@ -78,6 +79,22 @@ struct mpc83xx_clock {
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u32 sccr;
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};
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+struct mpc83xx_syscr {
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+ __be32 sgprl;
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+ __be32 sgprh;
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+ __be32 spridr;
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+ __be32 :32;
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+ __be32 spcr;
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+ __be32 sicrl;
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+ __be32 sicrh;
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+};
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+
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+struct mpc83xx_saved {
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+ u32 sicrl;
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+ u32 sicrh;
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+ u32 sccr;
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+};
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+
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struct pmc_type {
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int has_deep_sleep;
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};
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@@ -87,6 +104,8 @@ static int has_deep_sleep, deep_sleeping;
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static int pmc_irq;
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static struct mpc83xx_pmc __iomem *pmc_regs;
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static struct mpc83xx_clock __iomem *clock_regs;
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+static struct mpc83xx_syscr __iomem *syscr_regs;
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+static struct mpc83xx_saved saved_regs;
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static int is_pci_agent, wake_from_pci;
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static phys_addr_t immrbase;
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static int pci_pm_state;
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@@ -137,6 +156,20 @@ static irqreturn_t pmc_irq_handler(int irq, void *dev_id)
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return ret;
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}
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+static void mpc83xx_suspend_restore_regs(void)
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+{
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+ out_be32(&syscr_regs->sicrl, saved_regs.sicrl);
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+ out_be32(&syscr_regs->sicrh, saved_regs.sicrh);
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+ out_be32(&clock_regs->sccr, saved_regs.sccr);
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+}
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+
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+static void mpc83xx_suspend_save_regs(void)
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+{
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+ saved_regs.sicrl = in_be32(&syscr_regs->sicrl);
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+ saved_regs.sicrh = in_be32(&syscr_regs->sicrh);
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+ saved_regs.sccr = in_be32(&clock_regs->sccr);
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+}
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+
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static int mpc83xx_suspend_enter(suspend_state_t state)
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{
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int ret = -EAGAIN;
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@@ -166,6 +199,8 @@ static int mpc83xx_suspend_enter(suspend_state_t state)
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*/
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if (deep_sleeping) {
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+ mpc83xx_suspend_save_regs();
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+
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out_be32(&pmc_regs->mask, PMCER_ALL);
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out_be32(&pmc_regs->config1,
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@@ -179,6 +214,8 @@ static int mpc83xx_suspend_enter(suspend_state_t state)
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in_be32(&pmc_regs->config1) & ~PMCCR1_POWER_OFF);
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out_be32(&pmc_regs->mask, PMCER_PMCI);
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+
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+ mpc83xx_suspend_restore_regs();
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} else {
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out_be32(&pmc_regs->mask, PMCER_PMCI);
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@@ -333,12 +370,23 @@ static int pmc_probe(struct of_device *ofdev,
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goto out_pmc;
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}
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+ if (has_deep_sleep) {
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+ syscr_regs = ioremap(immrbase + IMMR_SYSCR_OFFSET,
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+ sizeof(*syscr_regs));
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+ if (!syscr_regs) {
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+ ret = -ENOMEM;
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+ goto out_syscr;
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+ }
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+ }
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+
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if (is_pci_agent)
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mpc83xx_set_agent();
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suspend_set_ops(&mpc83xx_suspend_ops);
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return 0;
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+out_syscr:
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+ iounmap(clock_regs);
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out_pmc:
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iounmap(pmc_regs);
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out:
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