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@@ -2705,7 +2705,20 @@ ath5k_intr(int irq, void *dev_id)
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*/
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tasklet_schedule(&sc->restq);
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} else if (unlikely(status & AR5K_INT_RXORN)) {
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- tasklet_schedule(&sc->restq);
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+ /*
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+ * Receive buffers are full. Either the bus is busy or
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+ * the CPU is not fast enough to process all received
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+ * frames.
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+ * Older chipsets need a reset to come out of this
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+ * condition, but we treat it as RX for newer chips.
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+ * We don't know exactly which versions need a reset -
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+ * this guess is copied from the HAL.
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+ */
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+ sc->stats.rxorn_intr++;
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+ if (ah->ah_mac_srev < AR5K_SREV_AR5212)
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+ tasklet_schedule(&sc->restq);
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+ else
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+ tasklet_schedule(&sc->rxtq);
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} else {
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if (status & AR5K_INT_SWBA) {
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tasklet_hi_schedule(&sc->beacontq);
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