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@@ -37,6 +37,7 @@
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#define PCI_DEVICE_ID_INTEL_BYT_SDIO 0x0f15
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#define PCI_DEVICE_ID_INTEL_BYT_SD 0x0f16
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#define PCI_DEVICE_ID_INTEL_BYT_EMMC2 0x0f50
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+#define PCI_DEVICE_ID_INTEL_MRFL_MMC 0x1190
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/*
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* PCI registers
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@@ -356,6 +357,28 @@ static const struct sdhci_pci_fixes sdhci_intel_byt_sd = {
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.allow_runtime_pm = true,
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};
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+/* Define Host controllers for Intel Merrifield platform */
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+#define INTEL_MRFL_EMMC_0 0
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+#define INTEL_MRFL_EMMC_1 1
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+
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+static int intel_mrfl_mmc_probe_slot(struct sdhci_pci_slot *slot)
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+{
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+ if ((PCI_FUNC(slot->chip->pdev->devfn) != INTEL_MRFL_EMMC_0) &&
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+ (PCI_FUNC(slot->chip->pdev->devfn) != INTEL_MRFL_EMMC_1))
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+ /* SD support is not ready yet */
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+ return -ENODEV;
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+
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+ slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
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+ MMC_CAP_1_8V_DDR;
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+
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+ return 0;
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+}
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+
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+static const struct sdhci_pci_fixes sdhci_intel_mrfl_mmc = {
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+ .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
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+ .probe_slot = intel_mrfl_mmc_probe_slot,
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+};
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+
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/* O2Micro extra registers */
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#define O2_SD_LOCK_WP 0xD3
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#define O2_SD_MULTI_VCC3V 0xEE
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@@ -939,6 +962,13 @@ static const struct pci_device_id pci_ids[] = {
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.driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
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},
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+ {
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+ .vendor = PCI_VENDOR_ID_INTEL,
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+ .device = PCI_DEVICE_ID_INTEL_MRFL_MMC,
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+ .subvendor = PCI_ANY_ID,
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+ .subdevice = PCI_ANY_ID,
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+ .driver_data = (kernel_ulong_t)&sdhci_intel_mrfl_mmc,
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+ },
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{
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.vendor = PCI_VENDOR_ID_O2,
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.device = PCI_DEVICE_ID_O2_8120,
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