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@@ -137,11 +137,11 @@ static inline unsigned long long native_read_pmc(int counter)
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* pointer indirection), this allows gcc to optimize better
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*/
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-#define rdmsr(msr, val1, val2) \
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+#define rdmsr(msr, low, high) \
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do { \
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u64 __val = native_read_msr((msr)); \
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- (void)((val1) = (u32)__val); \
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- (void)((val2) = (u32)(__val >> 32)); \
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+ (void)((low) = (u32)__val); \
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+ (void)((high) = (u32)(__val >> 32)); \
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} while (0)
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static inline void wrmsr(unsigned msr, unsigned low, unsigned high)
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@@ -162,12 +162,12 @@ static inline int wrmsr_safe(unsigned msr, unsigned low, unsigned high)
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}
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/* rdmsr with exception handling */
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-#define rdmsr_safe(msr, p1, p2) \
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+#define rdmsr_safe(msr, low, high) \
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({ \
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int __err; \
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u64 __val = native_read_msr_safe((msr), &__err); \
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- (*p1) = (u32)__val; \
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- (*p2) = (u32)(__val >> 32); \
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+ (*low) = (u32)__val; \
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+ (*high) = (u32)(__val >> 32); \
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__err; \
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})
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@@ -208,7 +208,7 @@ do { \
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#define wrmsrl_safe(msr, val) wrmsr_safe((msr), (u32)(val), \
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(u32)((val) >> 32))
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-#define write_tsc(val1, val2) wrmsr(MSR_IA32_TSC, (val1), (val2))
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+#define write_tsc(low, high) wrmsr(MSR_IA32_TSC, (low), (high))
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#define write_rdtscp_aux(val) wrmsr(MSR_TSC_AUX, (val), 0)
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