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@@ -653,6 +653,17 @@ static char *stdres[0x20] = {
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#define DSP_RETRY 32
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#define DSP_DELAY 16
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+#define SAA7135_DSP_RWCLEAR_RERR 1
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+
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+static inline int saa_dsp_reset_error_bit(struct saa7134_dev *dev)
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+{
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+ int state = saa_readb(SAA7135_DSP_RWSTATE);
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+ if (unlikely(state & SAA7135_DSP_RWSTATE_ERR)) {
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+ d2printk("%s: resetting error bit\n", dev->name);
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+ saa_writeb(SAA7135_DSP_RWCLEAR, SAA7135_DSP_RWCLEAR_RERR);
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+ }
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+ return 0;
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+}
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static inline int saa_dsp_wait_bit(struct saa7134_dev *dev, int bit)
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{
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@@ -660,8 +671,8 @@ static inline int saa_dsp_wait_bit(struct saa7134_dev *dev, int bit)
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state = saa_readb(SAA7135_DSP_RWSTATE);
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if (unlikely(state & SAA7135_DSP_RWSTATE_ERR)) {
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- printk("%s: dsp access error\n",dev->name);
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- /* FIXME: send ack ... */
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+ printk(KERN_WARNING "%s: dsp access error\n", dev->name);
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+ saa_dsp_reset_error_bit(dev);
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return -EIO;
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}
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while (0 == (state & bit)) {
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