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@@ -494,6 +494,7 @@ static int mxs_saif_trigger(struct snd_pcm_substream *substream, int cmd,
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struct mxs_saif *saif = snd_soc_dai_get_drvdata(cpu_dai);
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struct mxs_saif *master_saif;
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u32 delay;
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+ int ret;
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master_saif = mxs_saif_get_master(saif);
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if (!master_saif)
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@@ -508,21 +509,32 @@ static int mxs_saif_trigger(struct snd_pcm_substream *substream, int cmd,
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dev_dbg(cpu_dai->dev, "start\n");
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- clk_enable(master_saif->clk);
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- if (!master_saif->mclk_in_use)
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- __raw_writel(BM_SAIF_CTRL_RUN,
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- master_saif->base + SAIF_CTRL + MXS_SET_ADDR);
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+ ret = clk_enable(master_saif->clk);
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+ if (ret) {
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+ dev_err(saif->dev, "Failed to enable master clock\n");
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+ return ret;
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+ }
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/*
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* If the saif's master is not himself, we also need to enable
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* itself clk for its internal basic logic to work.
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*/
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if (saif != master_saif) {
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- clk_enable(saif->clk);
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+ ret = clk_enable(saif->clk);
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+ if (ret) {
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+ dev_err(saif->dev, "Failed to enable master clock\n");
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+ clk_disable(master_saif->clk);
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+ return ret;
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+ }
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+
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__raw_writel(BM_SAIF_CTRL_RUN,
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saif->base + SAIF_CTRL + MXS_SET_ADDR);
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}
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+ if (!master_saif->mclk_in_use)
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+ __raw_writel(BM_SAIF_CTRL_RUN,
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+ master_saif->base + SAIF_CTRL + MXS_SET_ADDR);
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+
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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/*
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* write data to saif data register to trigger
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