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@@ -1164,15 +1164,15 @@ static void rt2500pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
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{
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struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
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struct queue_entry_priv_pci *entry_priv = skbdesc->entry->priv_data;
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- __le32 *txd = skbdesc->desc;
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+ __le32 *txd = entry_priv->desc;
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u32 word;
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/*
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* Start writing the descriptor words.
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*/
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- rt2x00_desc_read(entry_priv->desc, 1, &word);
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+ rt2x00_desc_read(txd, 1, &word);
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rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, skbdesc->skb_dma);
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- rt2x00_desc_write(entry_priv->desc, 1, word);
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+ rt2x00_desc_write(txd, 1, word);
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rt2x00_desc_read(txd, 2, &word);
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rt2x00_set_field32(&word, TXD_W2_IV_OFFSET, IEEE80211_HEADER);
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@@ -1216,6 +1216,12 @@ static void rt2500pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
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rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length);
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rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE);
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rt2x00_desc_write(txd, 0, word);
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+
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+ /*
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+ * Register descriptor details in skb frame descriptor.
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+ */
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+ skbdesc->desc = txd;
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+ skbdesc->desc_len = TXD_DESC_SIZE;
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}
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/*
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@@ -1238,15 +1244,6 @@ static void rt2500pci_write_beacon(struct queue_entry *entry,
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rt2x00_set_field32(®, CSR14_BEACON_GEN, 0);
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rt2x00pci_register_write(rt2x00dev, CSR14, reg);
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- /*
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- * Replace rt2x00lib allocated descriptor with the
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- * pointer to the _real_ hardware descriptor.
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- * After that, map the beacon to DMA and update the
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- * descriptor.
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- */
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- memcpy(entry_priv->desc, skbdesc->desc, skbdesc->desc_len);
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- skbdesc->desc = entry_priv->desc;
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-
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rt2x00queue_map_txskb(rt2x00dev, entry->skb);
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rt2x00_desc_read(entry_priv->desc, 1, &word);
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