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@@ -919,7 +919,7 @@ u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id, u16 tx_rate, u8 flags)
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return sta_id;
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}
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-static int iwl3945_nic_set_pwr_src(struct iwl_priv *priv, int pwr_max)
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+static int iwl3945_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
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{
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int rc;
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unsigned long flags;
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@@ -931,7 +931,7 @@ static int iwl3945_nic_set_pwr_src(struct iwl_priv *priv, int pwr_max)
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return rc;
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}
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- if (!pwr_max) {
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+ if (src == IWL_PWR_SRC_VAUX) {
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u32 val;
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rc = pci_read_config_dword(priv->pci_dev,
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@@ -1195,7 +1195,10 @@ int iwl3945_hw_nic_init(struct iwl_priv *priv)
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return rc;
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IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
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- iwl3945_nic_set_pwr_src(priv, 1);
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+ rc = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
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+ if(rc)
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+ return rc;
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+
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priv->cfg->ops->lib->apm_ops.config(priv);
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/* Allocate the RX queue, or reset if it is already allocated */
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@@ -2694,6 +2697,7 @@ static struct iwl_lib_ops iwl3945_lib = {
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.reset = iwl3945_apm_reset,
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.stop = iwl3945_apm_stop,
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.config = iwl3945_nic_config,
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+ .set_pwr_src = iwl3945_set_pwr_src,
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},
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};
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