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@@ -267,7 +267,7 @@ void musb_load_testpacket(struct musb *musb)
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const char *otg_state_string(struct musb *musb)
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const char *otg_state_string(struct musb *musb)
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{
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{
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- switch (musb->xceiv.state) {
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+ switch (musb->xceiv->state) {
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case OTG_STATE_A_IDLE: return "a_idle";
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case OTG_STATE_A_IDLE: return "a_idle";
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case OTG_STATE_A_WAIT_VRISE: return "a_wait_vrise";
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case OTG_STATE_A_WAIT_VRISE: return "a_wait_vrise";
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case OTG_STATE_A_WAIT_BCON: return "a_wait_bcon";
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case OTG_STATE_A_WAIT_BCON: return "a_wait_bcon";
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@@ -302,11 +302,11 @@ void musb_otg_timer_func(unsigned long data)
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unsigned long flags;
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unsigned long flags;
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spin_lock_irqsave(&musb->lock, flags);
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spin_lock_irqsave(&musb->lock, flags);
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- switch (musb->xceiv.state) {
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+ switch (musb->xceiv->state) {
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case OTG_STATE_B_WAIT_ACON:
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case OTG_STATE_B_WAIT_ACON:
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DBG(1, "HNP: b_wait_acon timeout; back to b_peripheral\n");
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DBG(1, "HNP: b_wait_acon timeout; back to b_peripheral\n");
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musb_g_disconnect(musb);
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musb_g_disconnect(musb);
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- musb->xceiv.state = OTG_STATE_B_PERIPHERAL;
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+ musb->xceiv->state = OTG_STATE_B_PERIPHERAL;
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musb->is_active = 0;
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musb->is_active = 0;
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break;
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break;
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case OTG_STATE_A_WAIT_BCON:
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case OTG_STATE_A_WAIT_BCON:
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@@ -331,20 +331,20 @@ void musb_hnp_stop(struct musb *musb)
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void __iomem *mbase = musb->mregs;
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void __iomem *mbase = musb->mregs;
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u8 reg;
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u8 reg;
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- switch (musb->xceiv.state) {
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+ switch (musb->xceiv->state) {
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case OTG_STATE_A_PERIPHERAL:
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case OTG_STATE_A_PERIPHERAL:
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case OTG_STATE_A_WAIT_VFALL:
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case OTG_STATE_A_WAIT_VFALL:
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case OTG_STATE_A_WAIT_BCON:
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case OTG_STATE_A_WAIT_BCON:
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DBG(1, "HNP: Switching back to A-host\n");
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DBG(1, "HNP: Switching back to A-host\n");
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musb_g_disconnect(musb);
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musb_g_disconnect(musb);
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- musb->xceiv.state = OTG_STATE_A_IDLE;
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+ musb->xceiv->state = OTG_STATE_A_IDLE;
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MUSB_HST_MODE(musb);
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MUSB_HST_MODE(musb);
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musb->is_active = 0;
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musb->is_active = 0;
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break;
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break;
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case OTG_STATE_B_HOST:
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case OTG_STATE_B_HOST:
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DBG(1, "HNP: Disabling HR\n");
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DBG(1, "HNP: Disabling HR\n");
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hcd->self.is_b_host = 0;
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hcd->self.is_b_host = 0;
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- musb->xceiv.state = OTG_STATE_B_PERIPHERAL;
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+ musb->xceiv->state = OTG_STATE_B_PERIPHERAL;
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MUSB_DEV_MODE(musb);
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MUSB_DEV_MODE(musb);
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reg = musb_readb(mbase, MUSB_POWER);
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reg = musb_readb(mbase, MUSB_POWER);
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reg |= MUSB_POWER_SUSPENDM;
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reg |= MUSB_POWER_SUSPENDM;
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@@ -402,7 +402,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
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if (devctl & MUSB_DEVCTL_HM) {
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if (devctl & MUSB_DEVCTL_HM) {
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#ifdef CONFIG_USB_MUSB_HDRC_HCD
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#ifdef CONFIG_USB_MUSB_HDRC_HCD
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- switch (musb->xceiv.state) {
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+ switch (musb->xceiv->state) {
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case OTG_STATE_A_SUSPEND:
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case OTG_STATE_A_SUSPEND:
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/* remote wakeup? later, GetPortStatus
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/* remote wakeup? later, GetPortStatus
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* will stop RESUME signaling
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* will stop RESUME signaling
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@@ -425,12 +425,12 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
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musb->rh_timer = jiffies
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musb->rh_timer = jiffies
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+ msecs_to_jiffies(20);
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+ msecs_to_jiffies(20);
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- musb->xceiv.state = OTG_STATE_A_HOST;
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+ musb->xceiv->state = OTG_STATE_A_HOST;
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musb->is_active = 1;
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musb->is_active = 1;
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usb_hcd_resume_root_hub(musb_to_hcd(musb));
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usb_hcd_resume_root_hub(musb_to_hcd(musb));
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break;
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break;
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case OTG_STATE_B_WAIT_ACON:
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case OTG_STATE_B_WAIT_ACON:
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- musb->xceiv.state = OTG_STATE_B_PERIPHERAL;
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+ musb->xceiv->state = OTG_STATE_B_PERIPHERAL;
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musb->is_active = 1;
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musb->is_active = 1;
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MUSB_DEV_MODE(musb);
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MUSB_DEV_MODE(musb);
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break;
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break;
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@@ -441,11 +441,11 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
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}
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}
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#endif
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#endif
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} else {
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} else {
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- switch (musb->xceiv.state) {
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+ switch (musb->xceiv->state) {
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#ifdef CONFIG_USB_MUSB_HDRC_HCD
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#ifdef CONFIG_USB_MUSB_HDRC_HCD
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case OTG_STATE_A_SUSPEND:
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case OTG_STATE_A_SUSPEND:
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/* possibly DISCONNECT is upcoming */
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/* possibly DISCONNECT is upcoming */
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- musb->xceiv.state = OTG_STATE_A_HOST;
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+ musb->xceiv->state = OTG_STATE_A_HOST;
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usb_hcd_resume_root_hub(musb_to_hcd(musb));
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usb_hcd_resume_root_hub(musb_to_hcd(musb));
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break;
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break;
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#endif
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#endif
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@@ -490,7 +490,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
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*/
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*/
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musb_writeb(mbase, MUSB_DEVCTL, MUSB_DEVCTL_SESSION);
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musb_writeb(mbase, MUSB_DEVCTL, MUSB_DEVCTL_SESSION);
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musb->ep0_stage = MUSB_EP0_START;
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musb->ep0_stage = MUSB_EP0_START;
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- musb->xceiv.state = OTG_STATE_A_IDLE;
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+ musb->xceiv->state = OTG_STATE_A_IDLE;
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MUSB_HST_MODE(musb);
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MUSB_HST_MODE(musb);
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musb_set_vbus(musb, 1);
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musb_set_vbus(musb, 1);
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@@ -516,7 +516,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
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* REVISIT: do delays from lots of DEBUG_KERNEL checks
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* REVISIT: do delays from lots of DEBUG_KERNEL checks
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* make trouble here, keeping VBUS < 4.4V ?
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* make trouble here, keeping VBUS < 4.4V ?
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*/
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*/
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- switch (musb->xceiv.state) {
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+ switch (musb->xceiv->state) {
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case OTG_STATE_A_HOST:
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case OTG_STATE_A_HOST:
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/* recovery is dicey once we've gotten past the
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/* recovery is dicey once we've gotten past the
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* initial stages of enumeration, but if VBUS
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* initial stages of enumeration, but if VBUS
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@@ -602,11 +602,11 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
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MUSB_HST_MODE(musb);
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MUSB_HST_MODE(musb);
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/* indicate new connection to OTG machine */
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/* indicate new connection to OTG machine */
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- switch (musb->xceiv.state) {
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+ switch (musb->xceiv->state) {
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case OTG_STATE_B_PERIPHERAL:
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case OTG_STATE_B_PERIPHERAL:
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if (int_usb & MUSB_INTR_SUSPEND) {
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if (int_usb & MUSB_INTR_SUSPEND) {
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DBG(1, "HNP: SUSPEND+CONNECT, now b_host\n");
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DBG(1, "HNP: SUSPEND+CONNECT, now b_host\n");
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- musb->xceiv.state = OTG_STATE_B_HOST;
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+ musb->xceiv->state = OTG_STATE_B_HOST;
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hcd->self.is_b_host = 1;
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hcd->self.is_b_host = 1;
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int_usb &= ~MUSB_INTR_SUSPEND;
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int_usb &= ~MUSB_INTR_SUSPEND;
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} else
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} else
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@@ -614,13 +614,13 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
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break;
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break;
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case OTG_STATE_B_WAIT_ACON:
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case OTG_STATE_B_WAIT_ACON:
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DBG(1, "HNP: Waiting to switch to b_host state\n");
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DBG(1, "HNP: Waiting to switch to b_host state\n");
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- musb->xceiv.state = OTG_STATE_B_HOST;
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+ musb->xceiv->state = OTG_STATE_B_HOST;
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hcd->self.is_b_host = 1;
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hcd->self.is_b_host = 1;
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break;
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break;
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default:
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default:
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if ((devctl & MUSB_DEVCTL_VBUS)
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if ((devctl & MUSB_DEVCTL_VBUS)
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== (3 << MUSB_DEVCTL_VBUS_SHIFT)) {
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== (3 << MUSB_DEVCTL_VBUS_SHIFT)) {
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- musb->xceiv.state = OTG_STATE_A_HOST;
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+ musb->xceiv->state = OTG_STATE_A_HOST;
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hcd->self.is_b_host = 0;
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hcd->self.is_b_host = 0;
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}
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}
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break;
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break;
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@@ -650,7 +650,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
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}
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}
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} else if (is_peripheral_capable()) {
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} else if (is_peripheral_capable()) {
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DBG(1, "BUS RESET as %s\n", otg_state_string(musb));
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DBG(1, "BUS RESET as %s\n", otg_state_string(musb));
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- switch (musb->xceiv.state) {
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+ switch (musb->xceiv->state) {
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#ifdef CONFIG_USB_OTG
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#ifdef CONFIG_USB_OTG
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case OTG_STATE_A_SUSPEND:
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case OTG_STATE_A_SUSPEND:
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/* We need to ignore disconnect on suspend
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/* We need to ignore disconnect on suspend
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@@ -673,12 +673,12 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
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case OTG_STATE_B_WAIT_ACON:
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case OTG_STATE_B_WAIT_ACON:
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DBG(1, "HNP: RESET (%s), to b_peripheral\n",
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DBG(1, "HNP: RESET (%s), to b_peripheral\n",
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otg_state_string(musb));
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otg_state_string(musb));
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- musb->xceiv.state = OTG_STATE_B_PERIPHERAL;
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+ musb->xceiv->state = OTG_STATE_B_PERIPHERAL;
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musb_g_reset(musb);
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musb_g_reset(musb);
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break;
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break;
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#endif
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#endif
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case OTG_STATE_B_IDLE:
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case OTG_STATE_B_IDLE:
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- musb->xceiv.state = OTG_STATE_B_PERIPHERAL;
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+ musb->xceiv->state = OTG_STATE_B_PERIPHERAL;
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/* FALLTHROUGH */
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/* FALLTHROUGH */
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case OTG_STATE_B_PERIPHERAL:
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case OTG_STATE_B_PERIPHERAL:
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musb_g_reset(musb);
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musb_g_reset(musb);
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@@ -763,7 +763,7 @@ static irqreturn_t musb_stage2_irq(struct musb *musb, u8 int_usb,
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MUSB_MODE(musb), devctl);
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MUSB_MODE(musb), devctl);
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handled = IRQ_HANDLED;
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handled = IRQ_HANDLED;
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- switch (musb->xceiv.state) {
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+ switch (musb->xceiv->state) {
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#ifdef CONFIG_USB_MUSB_HDRC_HCD
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#ifdef CONFIG_USB_MUSB_HDRC_HCD
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case OTG_STATE_A_HOST:
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case OTG_STATE_A_HOST:
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case OTG_STATE_A_SUSPEND:
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case OTG_STATE_A_SUSPEND:
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@@ -805,7 +805,7 @@ static irqreturn_t musb_stage2_irq(struct musb *musb, u8 int_usb,
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otg_state_string(musb), devctl, power);
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otg_state_string(musb), devctl, power);
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handled = IRQ_HANDLED;
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handled = IRQ_HANDLED;
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- switch (musb->xceiv.state) {
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+ switch (musb->xceiv->state) {
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#ifdef CONFIG_USB_MUSB_OTG
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#ifdef CONFIG_USB_MUSB_OTG
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case OTG_STATE_A_PERIPHERAL:
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case OTG_STATE_A_PERIPHERAL:
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/*
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/*
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@@ -817,10 +817,10 @@ static irqreturn_t musb_stage2_irq(struct musb *musb, u8 int_usb,
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case OTG_STATE_B_PERIPHERAL:
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case OTG_STATE_B_PERIPHERAL:
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musb_g_suspend(musb);
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musb_g_suspend(musb);
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musb->is_active = is_otg_enabled(musb)
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musb->is_active = is_otg_enabled(musb)
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- && musb->xceiv.gadget->b_hnp_enable;
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+ && musb->xceiv->gadget->b_hnp_enable;
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if (musb->is_active) {
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if (musb->is_active) {
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#ifdef CONFIG_USB_MUSB_OTG
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#ifdef CONFIG_USB_MUSB_OTG
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- musb->xceiv.state = OTG_STATE_B_WAIT_ACON;
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+ musb->xceiv->state = OTG_STATE_B_WAIT_ACON;
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DBG(1, "HNP: Setting timer for b_ase0_brst\n");
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DBG(1, "HNP: Setting timer for b_ase0_brst\n");
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musb_otg_timer.data = (unsigned long)musb;
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musb_otg_timer.data = (unsigned long)musb;
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mod_timer(&musb_otg_timer, jiffies
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mod_timer(&musb_otg_timer, jiffies
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@@ -834,9 +834,9 @@ static irqreturn_t musb_stage2_irq(struct musb *musb, u8 int_usb,
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+ msecs_to_jiffies(musb->a_wait_bcon));
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+ msecs_to_jiffies(musb->a_wait_bcon));
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break;
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break;
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case OTG_STATE_A_HOST:
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case OTG_STATE_A_HOST:
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- musb->xceiv.state = OTG_STATE_A_SUSPEND;
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+ musb->xceiv->state = OTG_STATE_A_SUSPEND;
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musb->is_active = is_otg_enabled(musb)
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musb->is_active = is_otg_enabled(musb)
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- && musb->xceiv.host->b_hnp_enable;
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+ && musb->xceiv->host->b_hnp_enable;
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break;
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break;
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case OTG_STATE_B_HOST:
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case OTG_STATE_B_HOST:
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/* Transition to B_PERIPHERAL, see 6.8.2.6 p 44 */
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/* Transition to B_PERIPHERAL, see 6.8.2.6 p 44 */
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@@ -1682,7 +1682,7 @@ musb_vbus_store(struct device *dev, struct device_attribute *attr,
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spin_lock_irqsave(&musb->lock, flags);
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spin_lock_irqsave(&musb->lock, flags);
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musb->a_wait_bcon = val;
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musb->a_wait_bcon = val;
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- if (musb->xceiv.state == OTG_STATE_A_WAIT_BCON)
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+ if (musb->xceiv->state == OTG_STATE_A_WAIT_BCON)
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musb->is_active = 0;
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musb->is_active = 0;
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musb_platform_try_idle(musb, jiffies + msecs_to_jiffies(val));
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musb_platform_try_idle(musb, jiffies + msecs_to_jiffies(val));
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spin_unlock_irqrestore(&musb->lock, flags);
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spin_unlock_irqrestore(&musb->lock, flags);
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@@ -1743,8 +1743,8 @@ static void musb_irq_work(struct work_struct *data)
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struct musb *musb = container_of(data, struct musb, irq_work);
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struct musb *musb = container_of(data, struct musb, irq_work);
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static int old_state;
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static int old_state;
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- if (musb->xceiv.state != old_state) {
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- old_state = musb->xceiv.state;
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+ if (musb->xceiv->state != old_state) {
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+ old_state = musb->xceiv->state;
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sysfs_notify(&musb->controller->kobj, NULL, "mode");
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sysfs_notify(&musb->controller->kobj, NULL, "mode");
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}
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}
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}
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}
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@@ -1841,7 +1841,7 @@ static void musb_free(struct musb *musb)
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}
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}
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#ifdef CONFIG_USB_MUSB_OTG
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#ifdef CONFIG_USB_MUSB_OTG
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- put_device(musb->xceiv.dev);
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+ put_device(musb->xceiv->dev);
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#endif
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#endif
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#ifdef CONFIG_USB_MUSB_HDRC_HCD
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#ifdef CONFIG_USB_MUSB_HDRC_HCD
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@@ -1922,10 +1922,18 @@ bad_config:
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}
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}
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}
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}
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- /* assume vbus is off */
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-
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- /* platform adjusts musb->mregs and musb->isr if needed,
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- * and activates clocks
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+ /* The musb_platform_init() call:
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+ * - adjusts musb->mregs and musb->isr if needed,
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+ * - may initialize an integrated tranceiver
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+ * - initializes musb->xceiv, usually by otg_get_transceiver()
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+ * - activates clocks.
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+ * - stops powering VBUS
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+ * - assigns musb->board_set_vbus if host mode is enabled
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+ *
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+ * There are various transciever configurations. Blackfin,
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+ * DaVinci, TUSB60x0, and others integrate them. OMAP3 uses
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+ * external/discrete ones in various flavors (twl4030 family,
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+ * isp1504, non-OTG, etc) mostly hooking up through ULPI.
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*/
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*/
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musb->isr = generic_interrupt;
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musb->isr = generic_interrupt;
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status = musb_platform_init(musb);
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status = musb_platform_init(musb);
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|
@@ -1993,17 +2001,17 @@ bad_config:
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? "DMA" : "PIO",
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? "DMA" : "PIO",
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musb->nIrq);
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musb->nIrq);
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-#ifdef CONFIG_USB_MUSB_HDRC_HCD
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- /* host side needs more setup, except for no-host modes */
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|
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|
- if (musb->board_mode != MUSB_PERIPHERAL) {
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|
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+ /* host side needs more setup */
|
|
|
|
+ if (is_host_enabled(musb)) {
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|
struct usb_hcd *hcd = musb_to_hcd(musb);
|
|
struct usb_hcd *hcd = musb_to_hcd(musb);
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|
|
|
|
|
- if (musb->board_mode == MUSB_OTG)
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|
|
|
|
|
+ otg_set_host(musb->xceiv, &hcd->self);
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|
|
|
+
|
|
|
|
+ if (is_otg_enabled(musb))
|
|
hcd->self.otg_port = 1;
|
|
hcd->self.otg_port = 1;
|
|
- musb->xceiv.host = &hcd->self;
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|
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|
|
+ musb->xceiv->host = &hcd->self;
|
|
hcd->power_budget = 2 * (plat->power ? : 250);
|
|
hcd->power_budget = 2 * (plat->power ? : 250);
|
|
}
|
|
}
|
|
-#endif /* CONFIG_USB_MUSB_HDRC_HCD */
|
|
|
|
|
|
|
|
/* For the host-only role, we can activate right away.
|
|
/* For the host-only role, we can activate right away.
|
|
* (We expect the ID pin to be forcibly grounded!!)
|
|
* (We expect the ID pin to be forcibly grounded!!)
|
|
@@ -2011,8 +2019,8 @@ bad_config:
|
|
*/
|
|
*/
|
|
if (!is_otg_enabled(musb) && is_host_enabled(musb)) {
|
|
if (!is_otg_enabled(musb) && is_host_enabled(musb)) {
|
|
MUSB_HST_MODE(musb);
|
|
MUSB_HST_MODE(musb);
|
|
- musb->xceiv.default_a = 1;
|
|
|
|
- musb->xceiv.state = OTG_STATE_A_IDLE;
|
|
|
|
|
|
+ musb->xceiv->default_a = 1;
|
|
|
|
+ musb->xceiv->state = OTG_STATE_A_IDLE;
|
|
|
|
|
|
status = usb_add_hcd(musb_to_hcd(musb), -1, 0);
|
|
status = usb_add_hcd(musb_to_hcd(musb), -1, 0);
|
|
if (status)
|
|
if (status)
|
|
@@ -2027,8 +2035,8 @@ bad_config:
|
|
|
|
|
|
} else /* peripheral is enabled */ {
|
|
} else /* peripheral is enabled */ {
|
|
MUSB_DEV_MODE(musb);
|
|
MUSB_DEV_MODE(musb);
|
|
- musb->xceiv.default_a = 0;
|
|
|
|
- musb->xceiv.state = OTG_STATE_B_IDLE;
|
|
|
|
|
|
+ musb->xceiv->default_a = 0;
|
|
|
|
+ musb->xceiv->state = OTG_STATE_B_IDLE;
|
|
|
|
|
|
status = musb_gadget_setup(musb);
|
|
status = musb_gadget_setup(musb);
|
|
if (status)
|
|
if (status)
|