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@@ -13,8 +13,8 @@
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/ {
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model = "fsl,MPC8572DS";
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compatible = "fsl,MPC8572DS";
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- #address-cells = <1>;
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- #size-cells = <1>;
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+ #address-cells = <2>;
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+ #size-cells = <2>;
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aliases {
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ethernet0 = &enet0;
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@@ -61,7 +61,6 @@
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memory {
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device_type = "memory";
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- reg = <0x0 0x0>; // Filled by U-Boot
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};
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soc8572@ffe00000 {
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@@ -69,8 +68,8 @@
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#size-cells = <1>;
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device_type = "soc";
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compatible = "simple-bus";
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- ranges = <0x0 0xffe00000 0x100000>;
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- reg = <0xffe00000 0x1000>; // CCSRBAR & soc regs, remove once parse code for immrbase fixed
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+ ranges = <0x0 0 0xffe00000 0x100000>;
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+ reg = <0 0xffe00000 0 0x1000>; // CCSRBAR & soc regs, remove once parse code for immrbase fixed
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bus-frequency = <0>; // Filled out by uboot.
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memory-controller@2000 {
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@@ -351,10 +350,10 @@
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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- reg = <0xffe08000 0x1000>;
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+ reg = <0 0xffe08000 0 0x1000>;
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bus-range = <0 255>;
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- ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
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- 0x1000000 0x0 0x0 0xffc00000 0x0 0x10000>;
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+ ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
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+ 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x00010000>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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interrupts = <24 2>;
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@@ -561,10 +560,10 @@
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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- reg = <0xffe09000 0x1000>;
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+ reg = <0 0xffe09000 0 0x1000>;
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bus-range = <0 255>;
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- ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
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- 0x1000000 0x0 0x0 0xffc10000 0x0 0x10000>;
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+ ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
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+ 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x00010000>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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interrupts = <26 2>;
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@@ -598,10 +597,10 @@
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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- reg = <0xffe0a000 0x1000>;
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+ reg = <0 0xffe0a000 0 0x1000>;
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bus-range = <0 255>;
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- ranges = <0x2000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000
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- 0x1000000 0x0 0x0 0xffc20000 0x0 0x10000>;
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+ ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
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+ 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x00010000>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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interrupts = <27 2>;
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