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@@ -910,6 +910,84 @@ static void atmel_pmecc_core_init(struct mtd_info *mtd)
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pmecc_writel(host->ecc, CTRL, PMECC_CTRL_ENABLE);
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}
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+/*
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+ * Get ECC requirement in ONFI parameters, returns -1 if ONFI
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+ * parameters is not supported.
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+ * return 0 if success to get the ECC requirement.
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+ */
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+static int get_onfi_ecc_param(struct nand_chip *chip,
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+ int *ecc_bits, int *sector_size)
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+{
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+ *ecc_bits = *sector_size = 0;
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+
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+ if (chip->onfi_params.ecc_bits == 0xff)
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+ /* TODO: the sector_size and ecc_bits need to be find in
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+ * extended ecc parameter, currently we don't support it.
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+ */
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+ return -1;
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+
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+ *ecc_bits = chip->onfi_params.ecc_bits;
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+
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+ /* The default sector size (ecc codeword size) is 512 */
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+ *sector_size = 512;
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+
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+ return 0;
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+}
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+
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+/*
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+ * Get ecc requirement from ONFI parameters ecc requirement.
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+ * If pmecc-cap, pmecc-sector-size in DTS are not specified, this function
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+ * will set them according to ONFI ecc requirement. Otherwise, use the
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+ * value in DTS file.
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+ * return 0 if success. otherwise return error code.
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+ */
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+static int pmecc_choose_ecc(struct atmel_nand_host *host,
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+ int *cap, int *sector_size)
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+{
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+ /* Get ECC requirement from ONFI parameters */
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+ *cap = *sector_size = 0;
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+ if (host->nand_chip.onfi_version) {
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+ if (!get_onfi_ecc_param(&host->nand_chip, cap, sector_size))
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+ dev_info(host->dev, "ONFI params, minimum required ECC: %d bits in %d bytes\n",
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+ *cap, *sector_size);
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+ else
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+ dev_info(host->dev, "NAND chip ECC reqirement is in Extended ONFI parameter, we don't support yet.\n");
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+ } else {
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+ dev_info(host->dev, "NAND chip is not ONFI compliant, assume ecc_bits is 2 in 512 bytes");
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+ }
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+ if (*cap == 0 && *sector_size == 0) {
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+ *cap = 2;
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+ *sector_size = 512;
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+ }
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+
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+ /* If dts file doesn't specify then use the one in ONFI parameters */
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+ if (host->pmecc_corr_cap == 0) {
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+ /* use the most fitable ecc bits (the near bigger one ) */
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+ if (*cap <= 2)
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+ host->pmecc_corr_cap = 2;
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+ else if (*cap <= 4)
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+ host->pmecc_corr_cap = 4;
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+ else if (*cap < 8)
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+ host->pmecc_corr_cap = 8;
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+ else if (*cap < 12)
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+ host->pmecc_corr_cap = 12;
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+ else if (*cap < 24)
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+ host->pmecc_corr_cap = 24;
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+ else
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+ return -EINVAL;
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+ }
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+ if (host->pmecc_sector_size == 0) {
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+ /* use the most fitable sector size (the near smaller one ) */
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+ if (*sector_size >= 1024)
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+ host->pmecc_sector_size = 1024;
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+ else if (*sector_size >= 512)
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+ host->pmecc_sector_size = 512;
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+ else
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+ return -EINVAL;
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+ }
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+ return 0;
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+}
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+
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static int __init atmel_pmecc_nand_init_params(struct platform_device *pdev,
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struct atmel_nand_host *host)
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{
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@@ -918,9 +996,15 @@ static int __init atmel_pmecc_nand_init_params(struct platform_device *pdev,
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struct resource *regs, *regs_pmerr, *regs_rom;
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int cap, sector_size, err_no;
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- if (host->pmecc_corr_cap == 0 || host->pmecc_sector_size == 0)
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- /* TODO: Should use ONFI ecc parameters. */
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- return -EINVAL;
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+ err_no = pmecc_choose_ecc(host, &cap, §or_size);
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+ if (err_no) {
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+ dev_err(host->dev, "The NAND flash's ECC requirement are not support!");
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+ return err_no;
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+ }
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+
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+ if (cap != host->pmecc_corr_cap ||
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+ sector_size != host->pmecc_sector_size)
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+ dev_info(host->dev, "WARNING: Be Caution! Using different PMECC parameters from Nand ONFI ECC reqirement.\n");
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cap = host->pmecc_corr_cap;
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sector_size = host->pmecc_sector_size;
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