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@@ -39,96 +39,6 @@
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*/
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#define PMU_NONE(args)
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-#ifdef BRCM_FULLMAC
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-/* SDIO Pad drive strength to select value mappings */
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-typedef struct {
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- uint8 strength; /* Pad Drive Strength in mA */
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- uint8 sel; /* Chip-specific select value */
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-} sdiod_drive_str_t;
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-
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-/* SDIO Drive Strength to sel value table for PMU Rev 1 */
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-static const sdiod_drive_str_t sdiod_drive_strength_tab1[] = {
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- {4, 0x2},
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- {2, 0x3},
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- {1, 0x0},
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- {0, 0x0} };
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-
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-/* SDIO Drive Strength to sel value table for PMU Rev 2, 3 */
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-static const sdiod_drive_str_t sdiod_drive_strength_tab2[] = {
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- {12, 0x7},
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- {10, 0x6},
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- {8, 0x5},
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- {6, 0x4},
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- {4, 0x2},
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- {2, 0x1},
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- {0, 0x0} };
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-
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-#define SDIOD_DRVSTR_KEY(chip, pmu) (((chip) << 16) | (pmu))
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-
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-void
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-si_sdiod_drive_strength_init(si_t *sih, osl_t *osh, uint32 drivestrength)
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-{
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- chipcregs_t *cc;
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- uint origidx, intr_val = 0;
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- sdiod_drive_str_t *str_tab = NULL;
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- uint32 str_mask = 0;
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- uint32 str_shift = 0;
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-
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- if (!(sih->cccaps & CC_CAP_PMU)) {
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- return;
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- }
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-
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- /* Remember original core before switch to chipc */
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- cc = (chipcregs_t *) si_switch_core(sih, CC_CORE_ID, &origidx,
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- &intr_val);
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-
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- switch (SDIOD_DRVSTR_KEY(sih->chip, sih->pmurev)) {
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- case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 1):
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- str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab1;
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- str_mask = 0x30000000;
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- str_shift = 28;
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- break;
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- case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 2):
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- case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 3):
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- str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab2;
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- str_mask = 0x00003800;
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- str_shift = 11;
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- break;
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-
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- default:
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- PMU_MSG(("No SDIO Drive strength init done for chip %x rev %d "
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- "pmurev %d\n", sih->chip, sih->chiprev, sih->pmurev));
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-
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- break;
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- }
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-
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- if (str_tab != NULL) {
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- uint32 drivestrength_sel = 0;
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- uint32 cc_data_temp;
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- int i;
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-
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- for (i = 0; str_tab[i].strength != 0; i++) {
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- if (drivestrength >= str_tab[i].strength) {
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- drivestrength_sel = str_tab[i].sel;
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- break;
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- }
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- }
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-
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- W_REG(osh, &cc->chipcontrol_addr, 1);
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- cc_data_temp = R_REG(osh, &cc->chipcontrol_data);
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- cc_data_temp &= ~str_mask;
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- drivestrength_sel <<= str_shift;
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- cc_data_temp |= drivestrength_sel;
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- W_REG(osh, &cc->chipcontrol_data, cc_data_temp);
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-
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- PMU_MSG(("SDIO: %dmA drive strength selected, set to 0x%08x\n",
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- drivestrength, cc_data_temp));
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- }
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-
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- /* Return to original core */
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- si_restore_core(sih, origidx, intr_val);
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-}
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-#else /* BRCM_FULLMAC */
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/* PLL controls/clocks */
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static void si_pmu1_pllinit0(si_t *sih, osl_t *osh, chipcregs_t *cc,
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uint32 xtal);
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@@ -2017,6 +1927,17 @@ BCMINITFN(si_sdiod_drive_strength_init) (si_t *sih, osl_t *osh,
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&intr_val);
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switch (SDIOD_DRVSTR_KEY(sih->chip, sih->pmurev)) {
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+ case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 1):
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+ str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab1;
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+ str_mask = 0x30000000;
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+ str_shift = 28;
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+ break;
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+ case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 2):
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+ case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 3):
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+ str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab2;
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+ str_mask = 0x00003800;
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+ str_shift = 11;
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+ break;
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case SDIOD_DRVSTR_KEY(BCM4336_CHIP_ID, 8):
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str_tab = (sdiod_drive_str_t *) &sdiod_drive_strength_tab3;
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str_mask = 0x00003800;
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@@ -2772,4 +2693,3 @@ static void BCMATTACHFN(si_pmu_set_4330_plldivs) (si_t *sih)
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(m6div << PMU1_PLL0_PC2_M6DIV_SHIFT));
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si_pmu_pllcontrol(sih, PMU1_PLL0_PLLCTL2, ~0, pllc2);
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}
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-#endif /* BRCM_FULLMAC */
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