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@@ -25,16 +25,16 @@
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#define USBCTRL_OTGBASE_OFFSET 0x600
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#define MX31_OTG_SIC_SHIFT 29
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-#define MX31_OTG_SIC_MASK (0xf << MX31_OTG_SIC_SHIFT)
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+#define MX31_OTG_SIC_MASK (0x3 << MX31_OTG_SIC_SHIFT)
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#define MX31_OTG_PM_BIT (1 << 24)
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#define MX31_H2_SIC_SHIFT 21
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-#define MX31_H2_SIC_MASK (0xf << MX31_H2_SIC_SHIFT)
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+#define MX31_H2_SIC_MASK (0x3 << MX31_H2_SIC_SHIFT)
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#define MX31_H2_PM_BIT (1 << 16)
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#define MX31_H2_DT_BIT (1 << 5)
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#define MX31_H1_SIC_SHIFT 13
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-#define MX31_H1_SIC_MASK (0xf << MX31_H1_SIC_SHIFT)
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+#define MX31_H1_SIC_MASK (0x3 << MX31_H1_SIC_SHIFT)
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#define MX31_H1_PM_BIT (1 << 8)
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#define MX31_H1_DT_BIT (1 << 4)
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@@ -51,15 +51,15 @@ int mxc_set_usbcontrol(int port, unsigned int flags)
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v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
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v |= (flags & MXC_EHCI_INTERFACE_MASK)
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<< MX31_OTG_SIC_SHIFT;
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- if (flags & MXC_EHCI_POWER_PINS_ENABLED)
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+ if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
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v |= MX31_OTG_PM_BIT;
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break;
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case 1: /* H1 port */
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- v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT);
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+ v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT | MX31_H1_DT_BIT);
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v |= (flags & MXC_EHCI_INTERFACE_MASK)
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<< MX31_H1_SIC_SHIFT;
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- if (flags & MXC_EHCI_POWER_PINS_ENABLED)
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+ if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
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v |= MX31_H1_PM_BIT;
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if (!(flags & MXC_EHCI_TTL_ENABLED))
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@@ -67,7 +67,7 @@ int mxc_set_usbcontrol(int port, unsigned int flags)
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break;
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case 2: /* H2 port */
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- v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT);
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+ v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT | MX31_H2_DT_BIT);
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v |= (flags & MXC_EHCI_INTERFACE_MASK)
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<< MX31_H2_SIC_SHIFT;
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if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
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@@ -77,6 +77,8 @@ int mxc_set_usbcontrol(int port, unsigned int flags)
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v |= MX31_H2_DT_BIT;
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break;
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+ default:
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+ return -EINVAL;
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}
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writel(v, MX31_IO_ADDRESS(MX31_OTG_BASE_ADDR +
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