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@@ -78,7 +78,7 @@
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enum { KIRKWOOD_CPU_TO_L2, KIRKWOOD_CPU_TO_DDR };
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-static const struct coreclk_ratio __initconst kirkwood_coreclk_ratios[] = {
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+static const struct coreclk_ratio kirkwood_coreclk_ratios[] __initconst = {
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{ .id = KIRKWOOD_CPU_TO_L2, .name = "l2clk", },
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{ .id = KIRKWOOD_CPU_TO_DDR, .name = "ddrclk", }
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};
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@@ -90,7 +90,7 @@ static u32 __init kirkwood_get_tclk_freq(void __iomem *sar)
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return (opt) ? 166666667 : 200000000;
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}
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-static const u32 __initconst kirkwood_cpu_freqs[] = {
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+static const u32 kirkwood_cpu_freqs[] __initconst = {
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0, 0, 0, 0,
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600000000,
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0,
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@@ -111,12 +111,12 @@ static u32 __init kirkwood_get_cpu_freq(void __iomem *sar)
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return kirkwood_cpu_freqs[opt];
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}
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-static const int __initconst kirkwood_cpu_l2_ratios[8][2] = {
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+static const int kirkwood_cpu_l2_ratios[8][2] __initconst = {
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{ 0, 1 }, { 1, 2 }, { 0, 1 }, { 1, 3 },
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{ 0, 1 }, { 1, 4 }, { 0, 1 }, { 0, 1 }
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};
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-static const int __initconst kirkwood_cpu_ddr_ratios[16][2] = {
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+static const int kirkwood_cpu_ddr_ratios[16][2] __initconst = {
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{ 0, 1 }, { 0, 1 }, { 1, 2 }, { 0, 1 },
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{ 1, 3 }, { 0, 1 }, { 1, 4 }, { 2, 9 },
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{ 1, 5 }, { 1, 6 }, { 0, 1 }, { 0, 1 },
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@@ -145,7 +145,7 @@ static void __init kirkwood_get_clk_ratio(
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}
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}
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-static const u32 __initconst mv88f6180_cpu_freqs[] = {
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+static const u32 mv88f6180_cpu_freqs[] __initconst = {
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0, 0, 0, 0, 0,
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600000000,
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800000000,
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@@ -158,7 +158,7 @@ static u32 __init mv88f6180_get_cpu_freq(void __iomem *sar)
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return mv88f6180_cpu_freqs[opt];
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}
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-static const int __initconst mv88f6180_cpu_ddr_ratios[8][2] = {
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+static const int mv88f6180_cpu_ddr_ratios[8][2] __initconst = {
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{ 0, 1 }, { 0, 1 }, { 0, 1 }, { 0, 1 },
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{ 0, 1 }, { 1, 3 }, { 1, 4 }, { 1, 5 }
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};
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@@ -219,7 +219,7 @@ CLK_OF_DECLARE(mv88f6180_core_clk, "marvell,mv88f6180-core-clock",
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* Clock Gating Control
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*/
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-static const struct clk_gating_soc_desc __initconst kirkwood_gating_desc[] = {
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+static const struct clk_gating_soc_desc kirkwood_gating_desc[] __initconst = {
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{ "ge0", NULL, 0, 0 },
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{ "pex0", NULL, 2, 0 },
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{ "usb0", NULL, 3, 0 },
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