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@@ -0,0 +1,804 @@
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+/*
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+ * AD7746 capacitive sensor driver supporting AD7745, AD7746 and AD7747
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+ *
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+ * Copyright 2011 Analog Devices Inc.
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+ *
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+ * Licensed under the GPL-2.
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+ */
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+
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+#include <linux/interrupt.h>
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+#include <linux/device.h>
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+#include <linux/kernel.h>
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+#include <linux/slab.h>
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+#include <linux/sysfs.h>
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+#include <linux/i2c.h>
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+#include <linux/delay.h>
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+
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+#include "../iio.h"
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+#include "../sysfs.h"
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+
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+#include "ad7746.h"
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+
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+/*
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+ * AD7746 Register Definition
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+ */
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+
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+#define AD7746_REG_STATUS 0
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+#define AD7746_REG_CAP_DATA_HIGH 1
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+#define AD7746_REG_CAP_DATA_MID 2
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+#define AD7746_REG_CAP_DATA_LOW 3
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+#define AD7746_REG_VT_DATA_HIGH 4
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+#define AD7746_REG_VT_DATA_MID 5
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+#define AD7746_REG_VT_DATA_LOW 6
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+#define AD7746_REG_CAP_SETUP 7
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+#define AD7746_REG_VT_SETUP 8
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+#define AD7746_REG_EXC_SETUP 9
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+#define AD7746_REG_CFG 10
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+#define AD7746_REG_CAPDACA 11
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+#define AD7746_REG_CAPDACB 12
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+#define AD7746_REG_CAP_OFFH 13
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+#define AD7746_REG_CAP_OFFL 14
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+#define AD7746_REG_CAP_GAINH 15
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+#define AD7746_REG_CAP_GAINL 16
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+#define AD7746_REG_VOLT_GAINH 17
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+#define AD7746_REG_VOLT_GAINL 18
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+
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+/* Status Register Bit Designations (AD7746_REG_STATUS) */
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+#define AD7746_STATUS_EXCERR (1 << 3)
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+#define AD7746_STATUS_RDY (1 << 2)
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+#define AD7746_STATUS_RDYVT (1 << 1)
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+#define AD7746_STATUS_RDYCAP (1 << 0)
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+
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+/* Capacitive Channel Setup Register Bit Designations (AD7746_REG_CAP_SETUP) */
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+#define AD7746_CAPSETUP_CAPEN (1 << 7)
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+#define AD7746_CAPSETUP_CIN2 (1 << 6) /* AD7746 only */
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+#define AD7746_CAPSETUP_CAPDIFF (1 << 5)
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+#define AD7746_CAPSETUP_CACHOP (1 << 0)
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+
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+/* Voltage/Temperature Setup Register Bit Designations (AD7746_REG_VT_SETUP) */
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+#define AD7746_VTSETUP_VTEN (1 << 7)
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+#define AD7746_VTSETUP_VTMD_INT_TEMP (0 << 5)
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+#define AD7746_VTSETUP_VTMD_EXT_TEMP (1 << 5)
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+#define AD7746_VTSETUP_VTMD_VDD_MON (2 << 5)
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+#define AD7746_VTSETUP_VTMD_EXT_VIN (3 << 5)
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+#define AD7746_VTSETUP_EXTREF (1 << 4)
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+#define AD7746_VTSETUP_VTSHORT (1 << 1)
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+#define AD7746_VTSETUP_VTCHOP (1 << 0)
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+
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+/* Excitation Setup Register Bit Designations (AD7746_REG_EXC_SETUP) */
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+#define AD7746_EXCSETUP_CLKCTRL (1 << 7)
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+#define AD7746_EXCSETUP_EXCON (1 << 6)
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+#define AD7746_EXCSETUP_EXCB (1 << 5)
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+#define AD7746_EXCSETUP_NEXCB (1 << 4)
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+#define AD7746_EXCSETUP_EXCA (1 << 3)
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+#define AD7746_EXCSETUP_NEXCA (1 << 2)
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+#define AD7746_EXCSETUP_EXCLVL(x) (((x) & 0x3) << 0)
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+
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+/* Config Register Bit Designations (AD7746_REG_CFG) */
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+#define AD7746_CONF_VTFS(x) ((x) << 6)
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+#define AD7746_CONF_CAPFS(x) ((x) << 3)
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+#define AD7746_CONF_MODE_IDLE (0 << 0)
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+#define AD7746_CONF_MODE_CONT_CONV (1 << 0)
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+#define AD7746_CONF_MODE_SINGLE_CONV (2 << 0)
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+#define AD7746_CONF_MODE_PWRDN (3 << 0)
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+#define AD7746_CONF_MODE_OFFS_CAL (5 << 0)
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+#define AD7746_CONF_MODE_GAIN_CAL (6 << 0)
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+
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+/* CAPDAC Register Bit Designations (AD7746_REG_CAPDACx) */
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+#define AD7746_CAPDAC_DACEN (1 << 7)
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+#define AD7746_CAPDAC_DACP(x) ((x) & 0x7F)
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+
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+/*
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+ * struct ad7746_chip_info - chip specifc information
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+ */
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+
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+struct ad7746_chip_info {
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+ struct i2c_client *client;
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+ /*
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+ * Capacitive channel digital filter setup;
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+ * conversion time/update rate setup per channel
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+ */
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+ u8 config;
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+ u8 cap_setup;
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+ u8 vt_setup;
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+ u8 capdac[2][2];
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+ s8 capdac_set;
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+};
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+
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+enum ad7746_chan {
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+ VIN,
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+ VIN_VDD,
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+ TEMP_INT,
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+ TEMP_EXT,
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+ CIN1,
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+ CIN1_DIFF,
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+ CIN2,
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+ CIN2_DIFF,
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+};
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+
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+static const struct iio_chan_spec ad7746_channels[] = {
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+ [VIN] = {
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+ .type = IIO_VOLTAGE,
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+ .indexed = 1,
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+ .channel = 0,
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+ .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED),
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+ .address = AD7746_REG_VT_DATA_HIGH << 8 |
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+ AD7746_VTSETUP_VTMD_EXT_VIN,
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+ },
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+ [VIN_VDD] = {
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+ .type = IIO_VOLTAGE,
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+ .indexed = 1,
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+ .channel = 1,
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+ .extend_name = "supply",
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+ .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED),
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+ .address = AD7746_REG_VT_DATA_HIGH << 8 |
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+ AD7746_VTSETUP_VTMD_VDD_MON,
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+ },
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+ [TEMP_INT] = {
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+ .type = IIO_TEMP,
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+ .indexed = 1,
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+ .channel = 0,
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+ .processed_val = IIO_PROCESSED,
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+ .address = AD7746_REG_VT_DATA_HIGH << 8 |
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+ AD7746_VTSETUP_VTMD_INT_TEMP,
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+ },
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+ [TEMP_EXT] = {
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+ .type = IIO_TEMP,
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+ .indexed = 1,
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+ .channel = 1,
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+ .processed_val = IIO_PROCESSED,
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+ .address = AD7746_REG_VT_DATA_HIGH << 8 |
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+ AD7746_VTSETUP_VTMD_EXT_TEMP,
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+ },
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+ [CIN1] = {
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+ .type = IIO_CAPACITANCE,
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+ .indexed = 1,
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+ .channel = 0,
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+ .info_mask = (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE) |
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+ (1 << IIO_CHAN_INFO_CALIBBIAS_SHARED) |
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+ (1 << IIO_CHAN_INFO_OFFSET_SEPARATE) |
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+ (1 << IIO_CHAN_INFO_SCALE_SHARED),
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+ .address = AD7746_REG_CAP_DATA_HIGH << 8,
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+ },
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+ [CIN1_DIFF] = {
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+ .type = IIO_CAPACITANCE,
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+ .differential = 1,
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+ .indexed = 1,
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+ .channel = 0,
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+ .channel2 = 2,
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+ .info_mask = (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE) |
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+ (1 << IIO_CHAN_INFO_CALIBBIAS_SHARED) |
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+ (1 << IIO_CHAN_INFO_OFFSET_SEPARATE) |
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+ (1 << IIO_CHAN_INFO_SCALE_SHARED),
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+ .address = AD7746_REG_CAP_DATA_HIGH << 8 |
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+ AD7746_CAPSETUP_CAPDIFF
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+ },
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+ [CIN2] = {
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+ .type = IIO_CAPACITANCE,
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+ .indexed = 1,
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+ .channel = 1,
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+ .info_mask = (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE) |
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+ (1 << IIO_CHAN_INFO_CALIBBIAS_SHARED) |
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+ (1 << IIO_CHAN_INFO_OFFSET_SEPARATE) |
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+ (1 << IIO_CHAN_INFO_SCALE_SHARED),
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+ .address = AD7746_REG_CAP_DATA_HIGH << 8 |
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+ AD7746_CAPSETUP_CIN2,
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+ },
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+ [CIN2_DIFF] = {
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+ .type = IIO_CAPACITANCE,
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+ .differential = 1,
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+ .indexed = 1,
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+ .channel = 1,
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+ .channel2 = 3,
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+ .info_mask = (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE) |
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+ (1 << IIO_CHAN_INFO_CALIBBIAS_SHARED) |
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+ (1 << IIO_CHAN_INFO_OFFSET_SEPARATE) |
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+ (1 << IIO_CHAN_INFO_SCALE_SHARED),
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+ .address = AD7746_REG_CAP_DATA_HIGH << 8 |
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+ AD7746_CAPSETUP_CAPDIFF | AD7746_CAPSETUP_CIN2,
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+ }
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+};
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+
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+/* Values are Update Rate (Hz), Conversion Time (ms) + 1*/
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+static const unsigned char ad7746_vt_filter_rate_table[][2] = {
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+ {50, 20 + 1}, {31, 32 + 1}, {16, 62 + 1}, {8, 122 + 1},
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+};
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+
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+static const unsigned char ad7746_cap_filter_rate_table[][2] = {
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+ {91, 11 + 1}, {84, 12 + 1}, {50, 20 + 1}, {26, 38 + 1},
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+ {16, 62 + 1}, {13, 77 + 1}, {11, 92 + 1}, {9, 110 + 1},
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+};
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+
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+static int ad7746_select_channel(struct iio_dev *indio_dev,
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+ struct iio_chan_spec const *chan)
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+{
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+ struct ad7746_chip_info *chip = iio_priv(indio_dev);
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+ int ret, delay;
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+ u8 vt_setup, cap_setup;
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+
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+ switch (chan->type) {
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+ case IIO_CAPACITANCE:
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+ cap_setup = (chan->address & 0xFF) | AD7746_CAPSETUP_CAPEN;
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+ vt_setup = chip->vt_setup & ~AD7746_VTSETUP_VTEN;
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+ delay = ad7746_cap_filter_rate_table[(chip->config >> 3) &
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+ 0x7][1];
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+
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+ if (chip->capdac_set != chan->channel) {
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+ ret = i2c_smbus_write_byte_data(chip->client,
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+ AD7746_REG_CAPDACA,
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+ chip->capdac[chan->channel][0]);
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+ if (ret < 0)
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+ return ret;
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+ ret = i2c_smbus_write_byte_data(chip->client,
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+ AD7746_REG_CAPDACB,
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+ chip->capdac[chan->channel][1]);
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+ if (ret < 0)
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+ return ret;
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+
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+ chip->capdac_set = chan->channel;
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+ }
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+ break;
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+ case IIO_VOLTAGE:
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+ case IIO_TEMP:
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+ vt_setup = (chan->address & 0xFF) | AD7746_VTSETUP_VTEN;
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+ cap_setup = chip->cap_setup & ~AD7746_CAPSETUP_CAPEN;
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+ delay = ad7746_cap_filter_rate_table[(chip->config >> 6) &
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+ 0x3][1];
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+ break;
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+ default:
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+ return -EINVAL;
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+ }
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+
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+ if (chip->cap_setup != cap_setup) {
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+ ret = i2c_smbus_write_byte_data(chip->client,
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+ AD7746_REG_CAP_SETUP,
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+ cap_setup);
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+ if (ret < 0)
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+ return ret;
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+
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+ chip->cap_setup = cap_setup;
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+ }
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+
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+ if (chip->vt_setup != vt_setup) {
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+ ret = i2c_smbus_write_byte_data(chip->client,
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+ AD7746_REG_VT_SETUP,
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+ vt_setup);
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+ if (ret < 0)
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+ return ret;
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+
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+ chip->vt_setup = vt_setup;
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+ }
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+
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+ return delay;
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+}
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+
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+static inline ssize_t ad7746_start_calib(struct device *dev,
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+ struct device_attribute *attr,
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+ const char *buf,
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+ size_t len,
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+ u8 regval)
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+{
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+ struct iio_dev *indio_dev = dev_get_drvdata(dev);
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+ struct ad7746_chip_info *chip = iio_priv(indio_dev);
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+ bool doit;
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+ int ret, timeout = 10;
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+
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+ ret = strtobool(buf, &doit);
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+ if (ret < 0)
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+ return ret;
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+
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+ if (!doit)
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+ return 0;
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+
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+ mutex_lock(&indio_dev->mlock);
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+ regval |= chip->config;
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+ ret = i2c_smbus_write_byte_data(chip->client, AD7746_REG_CFG, regval);
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+ if (ret < 0) {
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+ mutex_unlock(&indio_dev->mlock);
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+ return ret;
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+ }
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+
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+ do {
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+ msleep(20);
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+ ret = i2c_smbus_read_byte_data(chip->client, AD7746_REG_CFG);
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+ if (ret < 0) {
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+ mutex_unlock(&indio_dev->mlock);
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+ return ret;
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+ }
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+ } while ((ret == regval) && timeout--);
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+
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+ mutex_unlock(&indio_dev->mlock);
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+
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+ return len;
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+}
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+
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+static ssize_t ad7746_start_offset_calib(struct device *dev,
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+ struct device_attribute *attr,
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+ const char *buf,
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+ size_t len)
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+{
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+ struct iio_dev *indio_dev = dev_get_drvdata(dev);
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+ int ret = ad7746_select_channel(indio_dev,
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+ &ad7746_channels[to_iio_dev_attr(attr)->address]);
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+ if (ret < 0)
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+ return ret;
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+
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+ return ad7746_start_calib(dev, attr, buf, len,
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+ AD7746_CONF_MODE_OFFS_CAL);
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+}
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+
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+static ssize_t ad7746_start_gain_calib(struct device *dev,
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+ struct device_attribute *attr,
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+ const char *buf,
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+ size_t len)
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+{
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+ struct iio_dev *indio_dev = dev_get_drvdata(dev);
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+ int ret = ad7746_select_channel(indio_dev,
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+ &ad7746_channels[to_iio_dev_attr(attr)->address]);
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+ if (ret < 0)
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+ return ret;
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+
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+ return ad7746_start_calib(dev, attr, buf, len,
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+ AD7746_CONF_MODE_GAIN_CAL);
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+}
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+
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+static IIO_DEVICE_ATTR(in_capacitance0_calibbias_calibration,
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+ S_IWUSR, NULL, ad7746_start_offset_calib, CIN1);
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+static IIO_DEVICE_ATTR(in_capacitance1_calibbias_calibration,
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+ S_IWUSR, NULL, ad7746_start_offset_calib, CIN2);
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+static IIO_DEVICE_ATTR(in_capacitance0_calibscale_calibration,
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+ S_IWUSR, NULL, ad7746_start_gain_calib, CIN1);
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+static IIO_DEVICE_ATTR(in_capacitance1_calibscale_calibration,
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+ S_IWUSR, NULL, ad7746_start_gain_calib, CIN2);
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+static IIO_DEVICE_ATTR(in_voltage0_calibscale_calibration,
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+ S_IWUSR, NULL, ad7746_start_gain_calib, VIN);
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+
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+static ssize_t ad7746_show_cap_filter_rate_setup(struct device *dev,
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+ struct device_attribute *attr,
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+ char *buf)
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+{
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+ struct iio_dev *indio_dev = dev_get_drvdata(dev);
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+ struct ad7746_chip_info *chip = iio_priv(indio_dev);
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+
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+ return sprintf(buf, "%d\n", ad7746_cap_filter_rate_table[
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|
|
+ (chip->config >> 3) & 0x7][0]);
|
|
|
+}
|
|
|
+
|
|
|
+static ssize_t ad7746_store_cap_filter_rate_setup(struct device *dev,
|
|
|
+ struct device_attribute *attr,
|
|
|
+ const char *buf,
|
|
|
+ size_t len)
|
|
|
+{
|
|
|
+ struct iio_dev *indio_dev = dev_get_drvdata(dev);
|
|
|
+ struct ad7746_chip_info *chip = iio_priv(indio_dev);
|
|
|
+ u8 data;
|
|
|
+ int ret, i;
|
|
|
+
|
|
|
+ ret = kstrtou8(buf, 10, &data);
|
|
|
+ if (ret < 0)
|
|
|
+ return ret;
|
|
|
+
|
|
|
+ for (i = 0; i < ARRAY_SIZE(ad7746_cap_filter_rate_table); i++)
|
|
|
+ if (data >= ad7746_cap_filter_rate_table[i][0])
|
|
|
+ break;
|
|
|
+
|
|
|
+ if (i >= ARRAY_SIZE(ad7746_cap_filter_rate_table))
|
|
|
+ i = ARRAY_SIZE(ad7746_cap_filter_rate_table) - 1;
|
|
|
+
|
|
|
+ mutex_lock(&indio_dev->mlock);
|
|
|
+ chip->config &= ~AD7746_CONF_CAPFS(0x7);
|
|
|
+ chip->config |= AD7746_CONF_CAPFS(i);
|
|
|
+ mutex_unlock(&indio_dev->mlock);
|
|
|
+
|
|
|
+ return len;
|
|
|
+}
|
|
|
+
|
|
|
+static ssize_t ad7746_show_vt_filter_rate_setup(struct device *dev,
|
|
|
+ struct device_attribute *attr,
|
|
|
+ char *buf)
|
|
|
+{
|
|
|
+ struct iio_dev *indio_dev = dev_get_drvdata(dev);
|
|
|
+ struct ad7746_chip_info *chip = iio_priv(indio_dev);
|
|
|
+
|
|
|
+ return sprintf(buf, "%d\n", ad7746_vt_filter_rate_table[
|
|
|
+ (chip->config >> 6) & 0x3][0]);
|
|
|
+}
|
|
|
+
|
|
|
+static ssize_t ad7746_store_vt_filter_rate_setup(struct device *dev,
|
|
|
+ struct device_attribute *attr,
|
|
|
+ const char *buf,
|
|
|
+ size_t len)
|
|
|
+{
|
|
|
+ struct iio_dev *indio_dev = dev_get_drvdata(dev);
|
|
|
+ struct ad7746_chip_info *chip = iio_priv(indio_dev);
|
|
|
+ u8 data;
|
|
|
+ int ret, i;
|
|
|
+
|
|
|
+ ret = kstrtou8(buf, 10, &data);
|
|
|
+ if (ret < 0)
|
|
|
+ return ret;
|
|
|
+
|
|
|
+ for (i = 0; i < ARRAY_SIZE(ad7746_vt_filter_rate_table); i++)
|
|
|
+ if (data >= ad7746_vt_filter_rate_table[i][0])
|
|
|
+ break;
|
|
|
+
|
|
|
+ if (i >= ARRAY_SIZE(ad7746_vt_filter_rate_table))
|
|
|
+ i = ARRAY_SIZE(ad7746_vt_filter_rate_table) - 1;
|
|
|
+
|
|
|
+ mutex_lock(&indio_dev->mlock);
|
|
|
+ chip->config &= ~AD7746_CONF_VTFS(0x3);
|
|
|
+ chip->config |= AD7746_CONF_VTFS(i);
|
|
|
+ mutex_unlock(&indio_dev->mlock);
|
|
|
+
|
|
|
+ return len;
|
|
|
+}
|
|
|
+
|
|
|
+static IIO_DEVICE_ATTR(in_capacitance_sampling_frequency,
|
|
|
+ S_IRUGO | S_IWUSR, ad7746_show_cap_filter_rate_setup,
|
|
|
+ ad7746_store_cap_filter_rate_setup, 0);
|
|
|
+
|
|
|
+static IIO_DEVICE_ATTR(in_voltage_sampling_frequency,
|
|
|
+ S_IRUGO | S_IWUSR, ad7746_show_vt_filter_rate_setup,
|
|
|
+ ad7746_store_vt_filter_rate_setup, 0);
|
|
|
+
|
|
|
+static IIO_CONST_ATTR(in_voltage_sampling_frequency_available, "50 31 16 8");
|
|
|
+static IIO_CONST_ATTR(in_capacitance_sampling_frequency_available,
|
|
|
+ "91 84 50 26 16 13 11 9");
|
|
|
+
|
|
|
+static struct attribute *ad7746_attributes[] = {
|
|
|
+ &iio_dev_attr_in_capacitance_sampling_frequency.dev_attr.attr,
|
|
|
+ &iio_dev_attr_in_voltage_sampling_frequency.dev_attr.attr,
|
|
|
+ &iio_dev_attr_in_capacitance0_calibbias_calibration.dev_attr.attr,
|
|
|
+ &iio_dev_attr_in_capacitance0_calibscale_calibration.dev_attr.attr,
|
|
|
+ &iio_dev_attr_in_capacitance1_calibscale_calibration.dev_attr.attr,
|
|
|
+ &iio_dev_attr_in_capacitance1_calibbias_calibration.dev_attr.attr,
|
|
|
+ &iio_dev_attr_in_voltage0_calibscale_calibration.dev_attr.attr,
|
|
|
+ &iio_const_attr_in_voltage_sampling_frequency_available.dev_attr.attr,
|
|
|
+ &iio_const_attr_in_capacitance_sampling_frequency_available.
|
|
|
+ dev_attr.attr,
|
|
|
+ NULL,
|
|
|
+};
|
|
|
+
|
|
|
+static const struct attribute_group ad7746_attribute_group = {
|
|
|
+ .attrs = ad7746_attributes,
|
|
|
+};
|
|
|
+
|
|
|
+static int ad7746_write_raw(struct iio_dev *indio_dev,
|
|
|
+ struct iio_chan_spec const *chan,
|
|
|
+ int val,
|
|
|
+ int val2,
|
|
|
+ long mask)
|
|
|
+{
|
|
|
+ struct ad7746_chip_info *chip = iio_priv(indio_dev);
|
|
|
+ int ret, reg;
|
|
|
+
|
|
|
+ mutex_lock(&indio_dev->mlock);
|
|
|
+
|
|
|
+ switch (mask) {
|
|
|
+ case (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE):
|
|
|
+ if (val != 1) {
|
|
|
+ ret = -EINVAL;
|
|
|
+ goto out;
|
|
|
+ }
|
|
|
+
|
|
|
+ val = (val2 * 1024) / 15625;
|
|
|
+
|
|
|
+ switch (chan->type) {
|
|
|
+ case IIO_CAPACITANCE:
|
|
|
+ reg = AD7746_REG_CAP_GAINH;
|
|
|
+ break;
|
|
|
+ case IIO_VOLTAGE:
|
|
|
+ reg = AD7746_REG_VOLT_GAINH;
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ ret = -EINVAL;
|
|
|
+ goto out;
|
|
|
+ }
|
|
|
+
|
|
|
+ ret = i2c_smbus_write_word_data(chip->client, reg, swab16(val));
|
|
|
+ if (ret < 0)
|
|
|
+ goto out;
|
|
|
+
|
|
|
+ ret = 0;
|
|
|
+ break;
|
|
|
+ case (1 << IIO_CHAN_INFO_CALIBBIAS_SHARED):
|
|
|
+ if ((val < 0) | (val > 0xFFFF)) {
|
|
|
+ ret = -EINVAL;
|
|
|
+ goto out;
|
|
|
+ }
|
|
|
+ ret = i2c_smbus_write_word_data(chip->client,
|
|
|
+ AD7746_REG_CAP_OFFH, swab16(val));
|
|
|
+ if (ret < 0)
|
|
|
+ goto out;
|
|
|
+
|
|
|
+ ret = 0;
|
|
|
+ break;
|
|
|
+ case (1 << IIO_CHAN_INFO_OFFSET_SEPARATE):
|
|
|
+ if ((val < 0) | (val > 43008000)) { /* 21pF */
|
|
|
+ ret = -EINVAL;
|
|
|
+ goto out;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* CAPDAC Scale = 21pF_typ / 127
|
|
|
+ * CIN Scale = 8.192pF / 2^24
|
|
|
+ * Offset Scale = CAPDAC Scale / CIN Scale = 338646
|
|
|
+ * */
|
|
|
+
|
|
|
+ val /= 338646;
|
|
|
+
|
|
|
+ chip->capdac[chan->channel][chan->differential] = (val > 0 ?
|
|
|
+ AD7746_CAPDAC_DACP(val) | AD7746_CAPDAC_DACEN : 0);
|
|
|
+
|
|
|
+ ret = i2c_smbus_write_byte_data(chip->client,
|
|
|
+ AD7746_REG_CAPDACA,
|
|
|
+ chip->capdac[chan->channel][0]);
|
|
|
+ if (ret < 0)
|
|
|
+ goto out;
|
|
|
+ ret = i2c_smbus_write_byte_data(chip->client,
|
|
|
+ AD7746_REG_CAPDACB,
|
|
|
+ chip->capdac[chan->channel][1]);
|
|
|
+ if (ret < 0)
|
|
|
+ goto out;
|
|
|
+
|
|
|
+ chip->capdac_set = chan->channel;
|
|
|
+
|
|
|
+ ret = 0;
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ ret = -EINVAL;
|
|
|
+ }
|
|
|
+
|
|
|
+out:
|
|
|
+ mutex_unlock(&indio_dev->mlock);
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static int ad7746_read_raw(struct iio_dev *indio_dev,
|
|
|
+ struct iio_chan_spec const *chan,
|
|
|
+ int *val, int *val2,
|
|
|
+ long mask)
|
|
|
+{
|
|
|
+ struct ad7746_chip_info *chip = iio_priv(indio_dev);
|
|
|
+ int ret, delay;
|
|
|
+ u8 regval, reg;
|
|
|
+
|
|
|
+ union {
|
|
|
+ u32 d32;
|
|
|
+ u8 d8[4];
|
|
|
+ } data;
|
|
|
+
|
|
|
+ mutex_lock(&indio_dev->mlock);
|
|
|
+
|
|
|
+ switch (mask) {
|
|
|
+ case 0:
|
|
|
+ ret = ad7746_select_channel(indio_dev, chan);
|
|
|
+ if (ret < 0)
|
|
|
+ goto out;
|
|
|
+ delay = ret;
|
|
|
+
|
|
|
+ regval = chip->config | AD7746_CONF_MODE_SINGLE_CONV;
|
|
|
+ ret = i2c_smbus_write_byte_data(chip->client, AD7746_REG_CFG,
|
|
|
+ regval);
|
|
|
+ if (ret < 0)
|
|
|
+ goto out;
|
|
|
+
|
|
|
+ msleep(delay);
|
|
|
+ /* Now read the actual register */
|
|
|
+
|
|
|
+ ret = i2c_smbus_read_i2c_block_data(chip->client,
|
|
|
+ chan->address >> 8, 3, &data.d8[1]);
|
|
|
+
|
|
|
+ if (ret < 0)
|
|
|
+ goto out;
|
|
|
+
|
|
|
+ *val = (be32_to_cpu(data.d32) & 0xFFFFFF) - 0x800000;
|
|
|
+
|
|
|
+ switch (chan->type) {
|
|
|
+ case IIO_TEMP:
|
|
|
+ /* temperature in milli degrees Celsius
|
|
|
+ * T = ((*val / 2048) - 4096) * 1000
|
|
|
+ */
|
|
|
+ *val = (*val * 125) / 256;
|
|
|
+ break;
|
|
|
+ case IIO_VOLTAGE:
|
|
|
+ if (chan->channel == 1) /* supply_raw*/
|
|
|
+ *val = *val * 6;
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ break;
|
|
|
+ }
|
|
|
+
|
|
|
+ ret = IIO_VAL_INT;
|
|
|
+ break;
|
|
|
+ case (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE):
|
|
|
+ switch (chan->type) {
|
|
|
+ case IIO_CAPACITANCE:
|
|
|
+ reg = AD7746_REG_CAP_GAINH;
|
|
|
+ break;
|
|
|
+ case IIO_VOLTAGE:
|
|
|
+ reg = AD7746_REG_VOLT_GAINH;
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ ret = -EINVAL;
|
|
|
+ goto out;
|
|
|
+ }
|
|
|
+
|
|
|
+ ret = i2c_smbus_read_word_data(chip->client, reg);
|
|
|
+ if (ret < 0)
|
|
|
+ goto out;
|
|
|
+ /* 1 + gain_val / 2^16 */
|
|
|
+ *val = 1;
|
|
|
+ *val2 = (15625 * swab16(ret)) / 1024;
|
|
|
+
|
|
|
+ ret = IIO_VAL_INT_PLUS_MICRO;
|
|
|
+ break;
|
|
|
+ case (1 << IIO_CHAN_INFO_CALIBBIAS_SHARED):
|
|
|
+ ret = i2c_smbus_read_word_data(chip->client,
|
|
|
+ AD7746_REG_CAP_OFFH);
|
|
|
+ if (ret < 0)
|
|
|
+ goto out;
|
|
|
+ *val = swab16(ret);
|
|
|
+
|
|
|
+ ret = IIO_VAL_INT;
|
|
|
+ break;
|
|
|
+ case (1 << IIO_CHAN_INFO_OFFSET_SEPARATE):
|
|
|
+ *val = AD7746_CAPDAC_DACP(chip->capdac[chan->channel]
|
|
|
+ [chan->differential]) * 338646;
|
|
|
+
|
|
|
+ ret = IIO_VAL_INT;
|
|
|
+ break;
|
|
|
+ case (1 << IIO_CHAN_INFO_SCALE_SHARED):
|
|
|
+ switch (chan->type) {
|
|
|
+ case IIO_CAPACITANCE:
|
|
|
+ /* 8.192pf / 2^24 */
|
|
|
+ *val2 = 488;
|
|
|
+ *val = 0;
|
|
|
+ break;
|
|
|
+ case IIO_VOLTAGE:
|
|
|
+ /* 1170mV / 2^23 */
|
|
|
+ *val2 = 139475;
|
|
|
+ *val = 0;
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ ret = -EINVAL;
|
|
|
+ goto out;
|
|
|
+ }
|
|
|
+
|
|
|
+ ret = IIO_VAL_INT_PLUS_NANO;
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ ret = -EINVAL;
|
|
|
+ };
|
|
|
+out:
|
|
|
+ mutex_unlock(&indio_dev->mlock);
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static const struct iio_info ad7746_info = {
|
|
|
+ .attrs = &ad7746_attribute_group,
|
|
|
+ .read_raw = &ad7746_read_raw,
|
|
|
+ .write_raw = &ad7746_write_raw,
|
|
|
+ .driver_module = THIS_MODULE,
|
|
|
+};
|
|
|
+
|
|
|
+/*
|
|
|
+ * device probe and remove
|
|
|
+ */
|
|
|
+
|
|
|
+static int __devinit ad7746_probe(struct i2c_client *client,
|
|
|
+ const struct i2c_device_id *id)
|
|
|
+{
|
|
|
+ struct ad7746_platform_data *pdata = client->dev.platform_data;
|
|
|
+ struct ad7746_chip_info *chip;
|
|
|
+ struct iio_dev *indio_dev;
|
|
|
+ int ret = 0;
|
|
|
+ unsigned char regval = 0;
|
|
|
+
|
|
|
+ indio_dev = iio_allocate_device(sizeof(*chip));
|
|
|
+ if (indio_dev == NULL) {
|
|
|
+ ret = -ENOMEM;
|
|
|
+ goto error_ret;
|
|
|
+ }
|
|
|
+ chip = iio_priv(indio_dev);
|
|
|
+ /* this is only used for device removal purposes */
|
|
|
+ i2c_set_clientdata(client, indio_dev);
|
|
|
+
|
|
|
+ chip->client = client;
|
|
|
+ chip->capdac_set = -1;
|
|
|
+
|
|
|
+ /* Establish that the iio_dev is a child of the i2c device */
|
|
|
+ indio_dev->name = id->name;
|
|
|
+ indio_dev->dev.parent = &client->dev;
|
|
|
+ indio_dev->info = &ad7746_info;
|
|
|
+ indio_dev->channels = ad7746_channels;
|
|
|
+ if (id->driver_data == 7746)
|
|
|
+ indio_dev->num_channels = ARRAY_SIZE(ad7746_channels);
|
|
|
+ else
|
|
|
+ indio_dev->num_channels = ARRAY_SIZE(ad7746_channels) - 2;
|
|
|
+ indio_dev->num_channels = ARRAY_SIZE(ad7746_channels);
|
|
|
+ indio_dev->modes = INDIO_DIRECT_MODE;
|
|
|
+
|
|
|
+ if (pdata) {
|
|
|
+ if (pdata->exca_en) {
|
|
|
+ if (pdata->exca_inv_en)
|
|
|
+ regval |= AD7746_EXCSETUP_NEXCA;
|
|
|
+ else
|
|
|
+ regval |= AD7746_EXCSETUP_EXCA;
|
|
|
+ }
|
|
|
+
|
|
|
+ if (pdata->excb_en) {
|
|
|
+ if (pdata->excb_inv_en)
|
|
|
+ regval |= AD7746_EXCSETUP_NEXCB;
|
|
|
+ else
|
|
|
+ regval |= AD7746_EXCSETUP_EXCB;
|
|
|
+ }
|
|
|
+
|
|
|
+ regval |= AD7746_EXCSETUP_EXCLVL(pdata->exclvl);
|
|
|
+ } else {
|
|
|
+ dev_warn(&client->dev, "No platform data? using default\n");
|
|
|
+ regval = AD7746_EXCSETUP_EXCA | AD7746_EXCSETUP_EXCB |
|
|
|
+ AD7746_EXCSETUP_EXCLVL(3);
|
|
|
+ }
|
|
|
+
|
|
|
+ ret = i2c_smbus_write_byte_data(chip->client,
|
|
|
+ AD7746_REG_EXC_SETUP, regval);
|
|
|
+ if (ret < 0)
|
|
|
+ goto error_free_dev;
|
|
|
+
|
|
|
+ ret = iio_device_register(indio_dev);
|
|
|
+ if (ret)
|
|
|
+ goto error_free_dev;
|
|
|
+
|
|
|
+ dev_info(&client->dev, "%s capacitive sensor registered\n", id->name);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+
|
|
|
+error_free_dev:
|
|
|
+ iio_free_device(indio_dev);
|
|
|
+error_ret:
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static int __devexit ad7746_remove(struct i2c_client *client)
|
|
|
+{
|
|
|
+ struct iio_dev *indio_dev = i2c_get_clientdata(client);
|
|
|
+
|
|
|
+ iio_device_unregister(indio_dev);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static const struct i2c_device_id ad7746_id[] = {
|
|
|
+ { "ad7745", 7745 },
|
|
|
+ { "ad7746", 7746 },
|
|
|
+ { "ad7747", 7747 },
|
|
|
+ {}
|
|
|
+};
|
|
|
+
|
|
|
+MODULE_DEVICE_TABLE(i2c, ad7746_id);
|
|
|
+
|
|
|
+static struct i2c_driver ad7746_driver = {
|
|
|
+ .driver = {
|
|
|
+ .name = KBUILD_MODNAME,
|
|
|
+ },
|
|
|
+ .probe = ad7746_probe,
|
|
|
+ .remove = __devexit_p(ad7746_remove),
|
|
|
+ .id_table = ad7746_id,
|
|
|
+};
|
|
|
+
|
|
|
+static __init int ad7746_init(void)
|
|
|
+{
|
|
|
+ return i2c_add_driver(&ad7746_driver);
|
|
|
+}
|
|
|
+
|
|
|
+static __exit void ad7746_exit(void)
|
|
|
+{
|
|
|
+ i2c_del_driver(&ad7746_driver);
|
|
|
+}
|
|
|
+
|
|
|
+MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
|
|
|
+MODULE_DESCRIPTION("Analog Devices AD7746/5/7 capacitive sensor driver");
|
|
|
+MODULE_LICENSE("GPL v2");
|
|
|
+
|
|
|
+module_init(ad7746_init);
|
|
|
+module_exit(ad7746_exit);
|
Michael Hennerich