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@@ -19,7 +19,10 @@
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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+#include <linux/irqdomain.h>
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#include <linux/io.h>
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+#include <linux/of.h>
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+#include <linux/of_irq.h>
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#include <asm/exception.h>
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#include <mach/mxs.h>
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#include <mach/common.h>
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@@ -33,7 +36,10 @@
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#define BM_ICOLL_INTERRUPTn_ENABLE 0x00000004
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#define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0 0x1
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+#define ICOLL_NUM_IRQS 128
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+
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static void __iomem *icoll_base = MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR);
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+static struct irq_domain *icoll_domain;
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static void icoll_ack_irq(struct irq_data *d)
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{
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@@ -49,13 +55,13 @@ static void icoll_ack_irq(struct irq_data *d)
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static void icoll_mask_irq(struct irq_data *d)
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{
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__raw_writel(BM_ICOLL_INTERRUPTn_ENABLE,
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- icoll_base + HW_ICOLL_INTERRUPTn_CLR(d->irq));
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+ icoll_base + HW_ICOLL_INTERRUPTn_CLR(d->hwirq));
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}
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static void icoll_unmask_irq(struct irq_data *d)
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{
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__raw_writel(BM_ICOLL_INTERRUPTn_ENABLE,
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- icoll_base + HW_ICOLL_INTERRUPTn_SET(d->irq));
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+ icoll_base + HW_ICOLL_INTERRUPTn_SET(d->hwirq));
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}
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static struct irq_chip mxs_icoll_chip = {
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@@ -72,6 +78,7 @@ asmlinkage void __exception_irq_entry icoll_handle_irq(struct pt_regs *regs)
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irqnr = __raw_readl(icoll_base + HW_ICOLL_STAT_OFFSET);
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if (irqnr != 0x7f) {
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__raw_writel(irqnr, icoll_base + HW_ICOLL_VECTOR);
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+ irqnr = irq_find_mapping(icoll_domain, irqnr);
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handle_IRQ(irqnr, regs);
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continue;
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}
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@@ -79,18 +86,40 @@ asmlinkage void __exception_irq_entry icoll_handle_irq(struct pt_regs *regs)
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} while (1);
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}
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-void __init icoll_init_irq(void)
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+static int icoll_irq_domain_map(struct irq_domain *d, unsigned int virq,
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+ irq_hw_number_t hw)
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{
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- int i;
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+ irq_set_chip_and_handler(virq, &mxs_icoll_chip, handle_level_irq);
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+ set_irq_flags(virq, IRQF_VALID);
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+
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+ return 0;
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+}
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+static struct irq_domain_ops icoll_irq_domain_ops = {
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+ .map = icoll_irq_domain_map,
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+ .xlate = irq_domain_xlate_onecell,
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+};
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+
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+void __init icoll_of_init(struct device_node *np,
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+ struct device_node *interrupt_parent)
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+{
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/*
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* Interrupt Collector reset, which initializes the priority
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* for each irq to level 0.
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*/
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mxs_reset_block(icoll_base + HW_ICOLL_CTRL);
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- for (i = 0; i < MXS_INTERNAL_IRQS; i++) {
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- irq_set_chip_and_handler(i, &mxs_icoll_chip, handle_level_irq);
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- set_irq_flags(i, IRQF_VALID);
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- }
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+ icoll_domain = irq_domain_add_linear(np, ICOLL_NUM_IRQS,
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+ &icoll_irq_domain_ops, NULL);
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+ WARN_ON(!icoll_domain);
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+}
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+
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+static const struct of_device_id icoll_of_match[] __initconst = {
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+ {.compatible = "fsl,icoll", .data = icoll_of_init},
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+ { /* sentinel */ }
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+};
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+
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+void __init icoll_init_irq(void)
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+{
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+ of_irq_init(icoll_of_match);
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}
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