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x86, mce: remove intel_set_thermal_handler()

and make intel_thermal_interrupt() static.

Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Hidetoshi Seto il y a 16 ans
Parent
commit
8363fc82d3
2 fichiers modifiés avec 2 ajouts et 8 suppressions
  1. 0 1
      arch/x86/include/asm/mce.h
  2. 2 7
      arch/x86/kernel/cpu/mcheck/therm_throt.c

+ 0 - 1
arch/x86/include/asm/mce.h

@@ -199,7 +199,6 @@ extern void (*mce_threshold_vector)(void);
  * Thermal handler
  * Thermal handler
  */
  */
 
 
-void intel_set_thermal_handler(void);
 void intel_init_thermal(struct cpuinfo_x86 *c);
 void intel_init_thermal(struct cpuinfo_x86 *c);
 
 
 #ifdef CONFIG_X86_NEW_MCE
 #ifdef CONFIG_X86_NEW_MCE

+ 2 - 7
arch/x86/kernel/cpu/mcheck/therm_throt.c

@@ -202,7 +202,7 @@ device_initcall(thermal_throttle_init_device);
 #endif /* CONFIG_SYSFS */
 #endif /* CONFIG_SYSFS */
 
 
 /* Thermal transition interrupt handler */
 /* Thermal transition interrupt handler */
-void intel_thermal_interrupt(void)
+static void intel_thermal_interrupt(void)
 {
 {
 	__u64 msr_val;
 	__u64 msr_val;
 
 
@@ -231,11 +231,6 @@ asmlinkage void smp_thermal_interrupt(struct pt_regs *regs)
 	ack_APIC_irq();
 	ack_APIC_irq();
 }
 }
 
 
-void intel_set_thermal_handler(void)
-{
-	smp_thermal_vector = intel_thermal_interrupt;
-}
-
 void intel_init_thermal(struct cpuinfo_x86 *c)
 void intel_init_thermal(struct cpuinfo_x86 *c)
 {
 {
 	unsigned int cpu = smp_processor_id();
 	unsigned int cpu = smp_processor_id();
@@ -278,7 +273,7 @@ void intel_init_thermal(struct cpuinfo_x86 *c)
 	wrmsr(MSR_IA32_THERM_INTERRUPT,
 	wrmsr(MSR_IA32_THERM_INTERRUPT,
 		l | (THERM_INT_LOW_ENABLE | THERM_INT_HIGH_ENABLE), h);
 		l | (THERM_INT_LOW_ENABLE | THERM_INT_HIGH_ENABLE), h);
 
 
-	intel_set_thermal_handler();
+	smp_thermal_vector = intel_thermal_interrupt;
 
 
 	rdmsr(MSR_IA32_MISC_ENABLE, l, h);
 	rdmsr(MSR_IA32_MISC_ENABLE, l, h);
 	wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);
 	wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);