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@@ -195,29 +195,10 @@ extern long mga_compat_ioctl(struct file *filp, unsigned int cmd,
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#define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER()
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-#if defined(__linux__) && defined(__alpha__)
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-#define MGA_BASE(reg) ((unsigned long)(dev_priv->mmio->handle))
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-#define MGA_ADDR(reg) (MGA_BASE(reg) + reg)
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-
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-#define MGA_DEREF(reg) (*(volatile u32 *)MGA_ADDR(reg))
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-#define MGA_DEREF8(reg) (*(volatile u8 *)MGA_ADDR(reg))
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-
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-#define MGA_READ(reg) (_MGA_READ((u32 *)MGA_ADDR(reg)))
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-#define MGA_READ8(reg) (_MGA_READ((u8 *)MGA_ADDR(reg)))
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-#define MGA_WRITE(reg, val) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF(reg) = val; } while (0)
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-#define MGA_WRITE8(reg, val) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF8(reg) = val; } while (0)
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-
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-static inline u32 _MGA_READ(u32 *addr)
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-{
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- DRM_MEMORYBARRIER();
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- return *(volatile u32 *)addr;
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-}
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-#else
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#define MGA_READ8(reg) DRM_READ8(dev_priv->mmio, (reg))
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#define MGA_READ(reg) DRM_READ32(dev_priv->mmio, (reg))
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#define MGA_WRITE8(reg, val) DRM_WRITE8(dev_priv->mmio, (reg), (val))
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#define MGA_WRITE(reg, val) DRM_WRITE32(dev_priv->mmio, (reg), (val))
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-#endif
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#define DWGREG0 0x1c00
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#define DWGREG0_END 0x1dff
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