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@@ -50,8 +50,8 @@
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#define TDA10048_CONF_C4_1 0x1E
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#define TDA10048_CONF_C4_2 0x1F
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#define TDA10048_CODE_IN_RAM 0x20
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-#define TDA10048_CHANNEL_INFO_1_R 0x22
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-#define TDA10048_CHANNEL_INFO_2_R 0x23
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+#define TDA10048_CHANNEL_INFO1_R 0x22
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+#define TDA10048_CHANNEL_INFO2_R 0x23
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#define TDA10048_CHANNEL_INFO1 0x24
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#define TDA10048_CHANNEL_INFO2 0x25
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#define TDA10048_TIME_ERROR_R 0x26
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@@ -64,8 +64,8 @@
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#define TDA10048_IT_STAT 0x32
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#define TDA10048_DSP_AD_LSB 0x3C
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#define TDA10048_DSP_AD_MSB 0x3D
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-#define TDA10048_DSP_REF_LSB 0x3E
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-#define TDA10048_DSP_REF_MSB 0x3F
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+#define TDA10048_DSP_REG_LSB 0x3E
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+#define TDA10048_DSP_REG_MSB 0x3F
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#define TDA10048_CONF_TRISTATE1 0x44
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#define TDA10048_CONF_TRISTATE2 0x45
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#define TDA10048_CONF_POLARITY 0x46
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@@ -1033,6 +1033,9 @@ static int tda10048_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
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*ucblocks = tda10048_readreg(state, TDA10048_UNCOR_CPT_MSB) << 8 |
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tda10048_readreg(state, TDA10048_UNCOR_CPT_LSB);
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+ /* clear the uncorrected TS packets counter when saturated */
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+ if (*ucblocks == 0xFFFF)
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+ tda10048_writereg(state, TDA10048_UNCOR_CTRL, 0x80);
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return 0;
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}
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