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@@ -61,6 +61,8 @@
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#define OpMem8 26ull /* 8-bit zero extended memory operand */
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#define OpImm64 27ull /* Sign extended 16/32/64-bit immediate */
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#define OpXLat 28ull /* memory at BX/EBX/RBX + zero-extended AL */
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+#define OpAccLo 29ull /* Low part of extended acc (AX/AX/EAX/RAX) */
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+#define OpAccHi 30ull /* High part of extended acc (-/DX/EDX/RDX) */
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#define OpBits 5 /* Width of operand field */
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#define OpMask ((1ull << OpBits) - 1)
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@@ -86,6 +88,7 @@
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#define DstMem64 (OpMem64 << DstShift)
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#define DstImmUByte (OpImmUByte << DstShift)
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#define DstDX (OpDX << DstShift)
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+#define DstAccLo (OpAccLo << DstShift)
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#define DstMask (OpMask << DstShift)
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/* Source operand type. */
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#define SrcShift 6
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@@ -108,6 +111,7 @@
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#define SrcImm64 (OpImm64 << SrcShift)
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#define SrcDX (OpDX << SrcShift)
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#define SrcMem8 (OpMem8 << SrcShift)
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+#define SrcAccHi (OpAccHi << SrcShift)
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#define SrcMask (OpMask << SrcShift)
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#define BitOp (1<<11)
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#define MemAbs (1<<12) /* Memory operand is absolute displacement */
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@@ -157,6 +161,8 @@
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#define NoWrite ((u64)1 << 45) /* No writeback */
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#define SrcWrite ((u64)1 << 46) /* Write back src operand */
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+#define DstXacc (DstAccLo | SrcAccHi | SrcWrite)
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+
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#define X2(x...) x, x
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#define X3(x...) X2(x), x
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#define X4(x...) X2(x), X2(x)
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@@ -4166,6 +4172,24 @@ static int decode_operand(struct x86_emulate_ctxt *ctxt, struct operand *op,
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fetch_register_operand(op);
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op->orig_val = op->val;
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break;
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+ case OpAccLo:
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+ op->type = OP_REG;
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+ op->bytes = (ctxt->d & ByteOp) ? 2 : ctxt->op_bytes;
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+ op->addr.reg = reg_rmw(ctxt, VCPU_REGS_RAX);
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+ fetch_register_operand(op);
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+ op->orig_val = op->val;
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+ break;
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+ case OpAccHi:
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+ if (ctxt->d & ByteOp) {
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+ op->type = OP_NONE;
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+ break;
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+ }
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+ op->type = OP_REG;
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+ op->bytes = ctxt->op_bytes;
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+ op->addr.reg = reg_rmw(ctxt, VCPU_REGS_RDX);
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+ fetch_register_operand(op);
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+ op->orig_val = op->val;
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+ break;
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case OpDI:
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op->type = OP_MEM;
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op->bytes = (ctxt->d & ByteOp) ? 1 : ctxt->op_bytes;
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