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@@ -252,8 +252,9 @@ nv40_grctx_init(struct drm_device *dev)
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memcpy(pgraph->ctxprog, fw->data, fw->size);
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cp = pgraph->ctxprog;
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- if (cp->signature != 0x5043564e || cp->version != 0 ||
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- cp->length != ((fw->size - 7) / 4)) {
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+ if (le32_to_cpu(cp->signature) != 0x5043564e ||
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+ cp->version != 0 ||
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+ le16_to_cpu(cp->length) != ((fw->size - 7) / 4)) {
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NV_ERROR(dev, "ctxprog invalid\n");
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release_firmware(fw);
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nv40_grctx_fini(dev);
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@@ -281,8 +282,9 @@ nv40_grctx_init(struct drm_device *dev)
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memcpy(pgraph->ctxvals, fw->data, fw->size);
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cv = (void *)pgraph->ctxvals;
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- if (cv->signature != 0x5643564e || cv->version != 0 ||
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- cv->length != ((fw->size - 9) / 8)) {
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+ if (le32_to_cpu(cv->signature) != 0x5643564e ||
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+ cv->version != 0 ||
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+ le32_to_cpu(cv->length) != ((fw->size - 9) / 8)) {
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NV_ERROR(dev, "ctxvals invalid\n");
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release_firmware(fw);
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nv40_grctx_fini(dev);
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@@ -294,8 +296,9 @@ nv40_grctx_init(struct drm_device *dev)
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cp = pgraph->ctxprog;
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nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_INDEX, 0);
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- for (i = 0; i < cp->length; i++)
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- nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_DATA, cp->data[i]);
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+ for (i = 0; i < le16_to_cpu(cp->length); i++)
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+ nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_DATA,
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+ le32_to_cpu(cp->data[i]));
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pgraph->accel_blocked = false;
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return 0;
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@@ -329,8 +332,9 @@ nv40_grctx_vals_load(struct drm_device *dev, struct nouveau_gpuobj *ctx)
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if (!cv)
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return;
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- for (i = 0; i < cv->length; i++)
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- nv_wo32(dev, ctx, cv->data[i].offset, cv->data[i].value);
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+ for (i = 0; i < le32_to_cpu(cv->length); i++)
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+ nv_wo32(dev, ctx, le32_to_cpu(cv->data[i].offset),
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+ le32_to_cpu(cv->data[i].value));
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}
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/*
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