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@@ -99,6 +99,15 @@ static struct cpm_pin mpc8272_ads_pins[] = {
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/* I2C */
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{3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
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{3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
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+
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+ /* USB */
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+ {2, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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+ {2, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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+ {2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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+ {2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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+ {3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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+ {3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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+ {3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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};
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static void __init init_ioports(void)
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@@ -112,6 +121,8 @@ static void __init init_ioports(void)
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cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
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cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
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+ cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK8, CPM_CLK_RX);
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+ cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK8, CPM_CLK_TX);
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cpm2_clk_setup(CPM_CLK_SCC4, CPM_BRG4, CPM_CLK_RX);
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cpm2_clk_setup(CPM_CLK_SCC4, CPM_BRG4, CPM_CLK_TX);
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cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK11, CPM_CLK_RX);
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@@ -147,6 +158,7 @@ static void __init mpc8272_ads_setup_arch(void)
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#define BCSR1_FETH_RST 0x04000000
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#define BCSR1_RS232_EN1 0x02000000
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#define BCSR1_RS232_EN2 0x01000000
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+#define BCSR3_USB_nEN 0x80000000
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#define BCSR3_FETHIEN2 0x10000000
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#define BCSR3_FETH2_RST 0x08000000
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@@ -156,6 +168,8 @@ static void __init mpc8272_ads_setup_arch(void)
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clrbits32(&bcsr[3], BCSR3_FETHIEN2);
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setbits32(&bcsr[3], BCSR3_FETH2_RST);
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+ clrbits32(&bcsr[3], BCSR3_USB_nEN);
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+
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iounmap(bcsr);
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init_ioports();
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