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@@ -65,10 +65,11 @@ titan_update_irq_hw(unsigned long mask)
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register int bcpu = boot_cpuid;
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#ifdef CONFIG_SMP
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- cpumask_t cpm = cpu_present_map;
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+ cpumask_t cpm;
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volatile unsigned long *dim0, *dim1, *dim2, *dim3;
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unsigned long mask0, mask1, mask2, mask3, dummy;
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+ cpumask_copy(&cpm, cpu_present_mask);
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mask &= ~isa_enable;
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mask0 = mask & titan_cpu_irq_affinity[0];
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mask1 = mask & titan_cpu_irq_affinity[1];
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@@ -84,10 +85,10 @@ titan_update_irq_hw(unsigned long mask)
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dim1 = &cchip->dim1.csr;
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dim2 = &cchip->dim2.csr;
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dim3 = &cchip->dim3.csr;
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- if (!cpu_isset(0, cpm)) dim0 = &dummy;
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- if (!cpu_isset(1, cpm)) dim1 = &dummy;
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- if (!cpu_isset(2, cpm)) dim2 = &dummy;
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- if (!cpu_isset(3, cpm)) dim3 = &dummy;
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+ if (!cpumask_test_cpu(0, &cpm)) dim0 = &dummy;
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+ if (!cpumask_test_cpu(1, &cpm)) dim1 = &dummy;
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+ if (!cpumask_test_cpu(2, &cpm)) dim2 = &dummy;
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+ if (!cpumask_test_cpu(3, &cpm)) dim3 = &dummy;
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*dim0 = mask0;
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*dim1 = mask1;
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@@ -137,7 +138,7 @@ titan_cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity)
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int cpu;
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for (cpu = 0; cpu < 4; cpu++) {
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- if (cpu_isset(cpu, affinity))
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+ if (cpumask_test_cpu(cpu, &affinity))
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titan_cpu_irq_affinity[cpu] |= 1UL << irq;
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else
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titan_cpu_irq_affinity[cpu] &= ~(1UL << irq);
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