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@@ -1339,10 +1339,8 @@ static int aty128_var_to_pll(u32 period_in_ps, struct aty128_pll *pll,
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if (vclk * 12 < c.ppll_min)
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vclk = c.ppll_min/12;
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- pll->post_divider = -1;
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-
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/* now, find an acceptable divider */
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- for (i = 0; i < sizeof(post_dividers); i++) {
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+ for (i = 0; i < ARRAY_SIZE(post_dividers); i++) {
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output_freq = post_dividers[i] * vclk;
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if (output_freq >= c.ppll_min && output_freq <= c.ppll_max) {
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pll->post_divider = post_dividers[i];
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@@ -1350,7 +1348,7 @@ static int aty128_var_to_pll(u32 period_in_ps, struct aty128_pll *pll,
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}
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}
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- if (pll->post_divider < 0)
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+ if (i == ARRAY_SIZE(post_dividers))
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return -EINVAL;
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/* calculate feedback divider */
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