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@@ -101,11 +101,8 @@ sgiioc4_init_hwif_ports(hw_regs_t * hw, unsigned long data_port,
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for (i = 0; i <= 7; i++)
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hw->io_ports_array[i] = reg + i * 4;
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- if (ctrl_port)
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- hw->io_ports.ctl_addr = ctrl_port;
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-
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- if (irq_port)
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- hw->io_ports.irq_addr = irq_port;
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+ hw->io_ports.ctl_addr = ctrl_port;
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+ hw->io_ports.irq_addr = irq_port;
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}
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static int
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@@ -303,16 +300,14 @@ static u8 sgiioc4_read_status(ide_hwif_t *hwif)
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unsigned long port = hwif->io_ports.status_addr;
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u8 reg = (u8) readb((void __iomem *) port);
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- if ((port & 0xFFF) == 0x11C) { /* Status register of IOC4 */
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- if (!(reg & ATA_BUSY)) { /* Not busy... check for interrupt */
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- unsigned long other_ir = port - 0x110;
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- unsigned int intr_reg = (u32) readl((void __iomem *) other_ir);
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+ if (!(reg & ATA_BUSY)) { /* Not busy... check for interrupt */
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+ unsigned long other_ir = port - 0x110;
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+ unsigned int intr_reg = (u32) readl((void __iomem *) other_ir);
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- /* Clear the Interrupt, Error bits on the IOC4 */
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- if (intr_reg & 0x03) {
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- writel(0x03, (void __iomem *) other_ir);
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- intr_reg = (u32) readl((void __iomem *) other_ir);
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- }
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+ /* Clear the Interrupt, Error bits on the IOC4 */
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+ if (intr_reg & 0x03) {
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+ writel(0x03, (void __iomem *) other_ir);
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+ intr_reg = (u32) readl((void __iomem *) other_ir);
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}
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}
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@@ -329,9 +324,6 @@ ide_dma_sgiioc4(ide_hwif_t *hwif, const struct ide_port_info *d)
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int num_ports = sizeof (ioc4_dma_regs_t);
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void *pad;
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- if (dma_base == 0)
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- return -1;
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-
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printk(KERN_INFO " %s: MMIO-DMA\n", hwif->name);
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if (request_mem_region(dma_base, num_ports, hwif->name) == NULL) {
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