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@@ -0,0 +1,521 @@
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+/*
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+ * AMD CPU Microcode Update Driver for Linux
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+ * Copyright (C) 2008 Advanced Micro Devices Inc.
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+ *
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+ * Author: Peter Oruba <peter.oruba@amd.com>
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+ *
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+ * Based on work by:
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+ * Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
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+ *
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+ * This driver allows to upgrade microcode on AMD
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+ * family 0x10 and 0x11 processors.
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+ *
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+ * Licensed unter the terms of the GNU General Public
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+ * License version 2. See file COPYING for details.
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+*/
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+
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+#include <linux/capability.h>
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+#include <linux/kernel.h>
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+#include <linux/init.h>
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+#include <linux/sched.h>
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+#include <linux/cpumask.h>
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+#include <linux/module.h>
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+#include <linux/slab.h>
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+#include <linux/vmalloc.h>
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+#include <linux/miscdevice.h>
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+#include <linux/spinlock.h>
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+#include <linux/mm.h>
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+#include <linux/fs.h>
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+#include <linux/mutex.h>
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+#include <linux/cpu.h>
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+#include <linux/firmware.h>
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+#include <linux/platform_device.h>
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+#include <linux/pci.h>
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+#include <linux/pci_ids.h>
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+
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+#include <asm/msr.h>
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+#include <asm/uaccess.h>
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+#include <asm/processor.h>
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+#include <asm/microcode.h>
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+
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+MODULE_DESCRIPTION("AMD Microcode Update Driver");
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+MODULE_AUTHOR("Peter Oruba <peter.oruba@amd.com>");
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+MODULE_LICENSE("GPLv2");
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+
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+#define UCODE_MAGIC 0x00414d44
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+#define UCODE_EQUIV_CPU_TABLE_TYPE 0x00000000
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+#define UCODE_UCODE_TYPE 0x00000001
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+
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+#define UCODE_MAX_SIZE (2048)
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+#define DEFAULT_UCODE_DATASIZE (896) /* 896 bytes */
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+#define MC_HEADER_SIZE (sizeof(struct microcode_header_amd)) /* 64 bytes */
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+#define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE) /* 960 bytes */
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+#define DWSIZE (sizeof(u32))
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+/* For now we support a fixed ucode total size only */
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+#define get_totalsize(mc) \
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+ ((((struct microcode_amd *)mc)->hdr.mc_patch_data_len * 28) \
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+ + MC_HEADER_SIZE)
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+
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+extern int microcode_init(void *opaque, struct module *module);
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+extern void microcode_exit(void);
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+
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+/* serialize access to the physical write */
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+static DEFINE_SPINLOCK(microcode_update_lock);
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+
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+/* no concurrent ->write()s are allowed on /dev/cpu/microcode */
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+extern struct mutex (microcode_mutex);
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+
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+struct equiv_cpu_entry *equiv_cpu_table;
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+
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+extern struct ucode_cpu_info ucode_cpu_info[NR_CPUS];
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+
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+static void collect_cpu_info_amd(int cpu)
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+{
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+ struct cpuinfo_x86 *c = &cpu_data(cpu);
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+ struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
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+
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+ /* We should bind the task to the CPU */
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+ BUG_ON(raw_smp_processor_id() != cpu);
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+ uci->rev = 0;
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+ uci->pf = 0;
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+ uci->mc.mc_amd = NULL;
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+ uci->valid = 1;
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+
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+ if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
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+ printk(KERN_ERR "microcode: CPU%d not a capable AMD processor\n",
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+ cpu);
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+ uci->valid = 0;
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+ return;
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+ }
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+
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+ asm volatile("movl %1, %%ecx; rdmsr"
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+ : "=a" (uci->rev)
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+ : "i" (0x0000008B) : "ecx");
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+
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+ printk(KERN_INFO "microcode: collect_cpu_info_amd : patch_id=0x%x\n",
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+ uci->rev);
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+}
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+
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+static int get_matching_microcode_amd(void *mc, int cpu)
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+{
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+ struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
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+ struct microcode_header_amd *mc_header = mc;
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+ unsigned long total_size = get_totalsize(mc_header);
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+ void *new_mc;
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+ struct pci_dev *nb_pci_dev, *sb_pci_dev;
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+ unsigned int current_cpu_id;
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+ unsigned int equiv_cpu_id = 0x00;
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+ unsigned int i = 0;
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+
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+ /* We should bind the task to the CPU */
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+ BUG_ON(cpu != raw_smp_processor_id());
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+
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+ /* This is a tricky part. We might be called from a write operation */
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+ /* to the device file instead of the usual process of firmware */
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+ /* loading. This routine needs to be able to distinguish both */
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+/* cases. This is done by checking if there alread is a equivalent */
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+ /* CPU table installed. If not, we're written through */
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+ /* /dev/cpu/microcode. */
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+/* Since we ignore all checks. The error case in which going through */
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+/* firmware loading and that table is not loaded has already been */
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+ /* checked earlier. */
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+ if (equiv_cpu_table == NULL) {
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+ printk(KERN_INFO "microcode: CPU%d microcode update with "
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+ "version 0x%x (current=0x%x)\n",
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+ cpu, mc_header->patch_id, uci->rev);
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+ goto out;
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+ }
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+
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+ current_cpu_id = cpuid_eax(0x00000001);
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+
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+ while (equiv_cpu_table[i].installed_cpu != 0) {
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+ if (current_cpu_id == equiv_cpu_table[i].installed_cpu) {
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+ equiv_cpu_id = equiv_cpu_table[i].equiv_cpu;
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+ break;
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+ }
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+ i++;
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+ }
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+
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+ if (!equiv_cpu_id) {
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+ printk(KERN_ERR "microcode: CPU%d cpu_id "
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+ "not found in equivalent cpu table \n", cpu);
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+ return 0;
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+ }
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+
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+ if ((mc_header->processor_rev_id[0]) != (equiv_cpu_id & 0xff)) {
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+ printk(KERN_ERR
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+ "microcode: CPU%d patch does not match "
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+ "(patch is %x, cpu extended is %x) \n",
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+ cpu, mc_header->processor_rev_id[0],
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+ (equiv_cpu_id & 0xff));
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+ return 0;
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+ }
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+
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+ if ((mc_header->processor_rev_id[1]) != ((equiv_cpu_id >> 16) & 0xff)) {
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+ printk(KERN_ERR "microcode: CPU%d patch does not match "
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+ "(patch is %x, cpu base id is %x) \n",
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+ cpu, mc_header->processor_rev_id[1],
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+ ((equiv_cpu_id >> 16) & 0xff));
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+
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+ return 0;
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+ }
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+
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+ /* ucode may be northbridge specific */
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+ if (mc_header->nb_dev_id) {
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+ nb_pci_dev = pci_get_device(PCI_VENDOR_ID_AMD,
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+ (mc_header->nb_dev_id & 0xff),
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+ NULL);
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+ if ((!nb_pci_dev) ||
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+ (mc_header->nb_rev_id != nb_pci_dev->revision)) {
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+ printk(KERN_ERR "microcode: CPU%d NB mismatch \n", cpu);
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+ pci_dev_put(nb_pci_dev);
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+ return 0;
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+ }
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+ pci_dev_put(nb_pci_dev);
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+ }
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+
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+ /* ucode may be southbridge specific */
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+ if (mc_header->sb_dev_id) {
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+ sb_pci_dev = pci_get_device(PCI_VENDOR_ID_AMD,
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+ (mc_header->sb_dev_id & 0xff),
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+ NULL);
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+ if ((!sb_pci_dev) ||
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+ (mc_header->sb_rev_id != sb_pci_dev->revision)) {
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+ printk(KERN_ERR "microcode: CPU%d SB mismatch \n", cpu);
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+ pci_dev_put(sb_pci_dev);
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+ return 0;
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+ }
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+ pci_dev_put(sb_pci_dev);
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+ }
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+
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+ if (mc_header->patch_id <= uci->rev)
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+ return 0;
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+
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+ printk(KERN_INFO "microcode: CPU%d found a matching microcode "
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+ "update with version 0x%x (current=0x%x)\n",
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+ cpu, mc_header->patch_id, uci->rev);
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+
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+out:
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+ new_mc = vmalloc(UCODE_MAX_SIZE);
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+ if (!new_mc) {
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+ printk(KERN_ERR "microcode: error, can't allocate memory\n");
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+ return -ENOMEM;
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+ }
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+ memset(new_mc, 0, UCODE_MAX_SIZE);
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+
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+ /* free previous update file */
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+ vfree(uci->mc.mc_amd);
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+
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+ memcpy(new_mc, mc, total_size);
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+
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+ uci->mc.mc_amd = new_mc;
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+ return 1;
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+}
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+
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+static void apply_microcode_amd(int cpu)
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+{
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+ unsigned long flags;
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+ unsigned int eax, edx;
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+ unsigned int rev;
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+ int cpu_num = raw_smp_processor_id();
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+ struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
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+
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+ /* We should bind the task to the CPU */
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+ BUG_ON(cpu_num != cpu);
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+
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+ if (uci->mc.mc_amd == NULL)
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+ return;
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+
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+ spin_lock_irqsave(µcode_update_lock, flags);
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+
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+ edx = (unsigned int)(((unsigned long)
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+ &(uci->mc.mc_amd->hdr.data_code)) >> 32);
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+ eax = (unsigned int)(((unsigned long)
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+ &(uci->mc.mc_amd->hdr.data_code)) & 0xffffffffL);
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+
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+ asm volatile("movl %0, %%ecx; wrmsr" :
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+ : "i" (0xc0010020), "a" (eax), "d" (edx) : "ecx");
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+
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+ /* get patch id after patching */
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+ asm volatile("movl %1, %%ecx; rdmsr"
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+ : "=a" (rev)
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+ : "i" (0x0000008B) : "ecx");
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+
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+ spin_unlock_irqrestore(µcode_update_lock, flags);
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+
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+ /* check current patch id and patch's id for match */
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+ if (rev != uci->mc.mc_amd->hdr.patch_id) {
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+ printk(KERN_ERR "microcode: CPU%d update from revision "
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+ "0x%x to 0x%x failed\n", cpu_num,
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+ uci->mc.mc_amd->hdr.patch_id, rev);
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+ return;
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+ }
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+
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+ printk(KERN_INFO "microcode: CPU%d updated from revision "
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+ "0x%x to 0x%x \n",
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+ cpu_num, uci->rev, uci->mc.mc_amd->hdr.patch_id);
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+
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+ uci->rev = rev;
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+}
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+
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+#ifdef CONFIG_MICROCODE_OLD_INTERFACE
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+extern void __user *user_buffer; /* user area microcode data buffer */
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+extern unsigned int user_buffer_size; /* it's size */
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+
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+static long get_next_ucode_amd(void **mc, long offset)
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+{
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+ struct microcode_header_amd mc_header;
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+ unsigned long total_size;
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+
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+ /* No more data */
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+ if (offset >= user_buffer_size)
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+ return 0;
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+ if (copy_from_user(&mc_header, user_buffer + offset, MC_HEADER_SIZE)) {
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+ printk(KERN_ERR "microcode: error! Can not read user data\n");
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+ return -EFAULT;
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+ }
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+ total_size = get_totalsize(&mc_header);
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+ if (offset + total_size > user_buffer_size) {
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+ printk(KERN_ERR "microcode: error! Bad total size in microcode "
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+ "data file\n");
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+ return -EINVAL;
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+ }
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+ *mc = vmalloc(UCODE_MAX_SIZE);
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+ if (!*mc)
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+ return -ENOMEM;
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+ memset(*mc, 0, UCODE_MAX_SIZE);
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+
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+ if (copy_from_user(*mc, user_buffer + offset, total_size)) {
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+ printk(KERN_ERR "microcode: error! Can not read user data\n");
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+ vfree(*mc);
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+ return -EFAULT;
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+ }
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+ return offset + total_size;
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+}
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+#else
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+#define get_next_ucode_amd() NULL
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+#endif
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+
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+static long get_next_ucode_from_buffer_amd(void **mc, void *buf,
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+ unsigned long size, long offset)
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+{
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+ struct microcode_header_amd *mc_header;
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+ unsigned long total_size;
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+ unsigned char *buf_pos = buf;
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+
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+ /* No more data */
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+ if (offset >= size)
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+ return 0;
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+
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+ if (buf_pos[offset] != UCODE_UCODE_TYPE) {
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+ printk(KERN_ERR "microcode: error! "
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+ "Wrong microcode payload type field\n");
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+ return -EINVAL;
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+ }
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+
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+ mc_header = (struct microcode_header_amd *)(&buf_pos[offset+8]);
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+
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+ total_size = (unsigned long) (buf_pos[offset+4] +
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+ (buf_pos[offset+5] << 8));
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+
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+ printk(KERN_INFO "microcode: size %lu, total_size %lu, offset %ld\n",
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+ size, total_size, offset);
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+
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+ if (offset + total_size > size) {
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+ printk(KERN_ERR "microcode: error! Bad data in microcode data file\n");
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+ return -EINVAL;
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+ }
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+
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+ *mc = vmalloc(UCODE_MAX_SIZE);
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+ if (!*mc) {
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+ printk(KERN_ERR "microcode: error! "
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+ "Can not allocate memory for microcode patch\n");
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+ return -ENOMEM;
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+ }
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+
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+ memset(*mc, 0, UCODE_MAX_SIZE);
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+ memcpy(*mc, buf + offset + 8, total_size);
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+
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|
|
|
+ return offset + total_size + 8;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static long install_equiv_cpu_table(void *buf, unsigned long size, long offset)
|
|
|
|
+{
|
|
|
|
+ unsigned int *buf_pos = buf;
|
|
|
|
+
|
|
|
|
+ /* No more data */
|
|
|
|
+ if (offset >= size)
|
|
|
|
+ return 0;
|
|
|
|
+
|
|
|
|
+ if (buf_pos[1] != UCODE_EQUIV_CPU_TABLE_TYPE) {
|
|
|
|
+ printk(KERN_ERR "microcode: error! "
|
|
|
|
+ "Wrong microcode equivalnet cpu table type field\n");
|
|
|
|
+ return 0;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ if (size == 0) {
|
|
|
|
+ printk(KERN_ERR "microcode: error! "
|
|
|
|
+ "Wrong microcode equivalnet cpu table length\n");
|
|
|
|
+ return 0;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ equiv_cpu_table = (struct equiv_cpu_entry *) vmalloc(size);
|
|
|
|
+ if (!equiv_cpu_table) {
|
|
|
|
+ printk(KERN_ERR "microcode: error, can't allocate memory for equiv CPU table\n");
|
|
|
|
+ return 0;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ memset(equiv_cpu_table, 0, size);
|
|
|
|
+ memcpy(equiv_cpu_table, &buf_pos[3], size);
|
|
|
|
+
|
|
|
|
+ return size + 12; /* add header length */
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+/* fake device for request_firmware */
|
|
|
|
+extern struct platform_device *microcode_pdev;
|
|
|
|
+
|
|
|
|
+static int cpu_request_microcode_amd(int cpu)
|
|
|
|
+{
|
|
|
|
+ char name[30];
|
|
|
|
+ const struct firmware *firmware;
|
|
|
|
+ void *buf;
|
|
|
|
+ unsigned int *buf_pos;
|
|
|
|
+ unsigned long size;
|
|
|
|
+ long offset = 0;
|
|
|
|
+ int error;
|
|
|
|
+ void *mc;
|
|
|
|
+
|
|
|
|
+ /* We should bind the task to the CPU */
|
|
|
|
+ BUG_ON(cpu != raw_smp_processor_id());
|
|
|
|
+
|
|
|
|
+ sprintf(name, "amd-ucode/microcode_amd.bin");
|
|
|
|
+ error = request_firmware(&firmware, "amd-ucode/microcode_amd.bin",
|
|
|
|
+ µcode_pdev->dev);
|
|
|
|
+ if (error) {
|
|
|
|
+ printk(KERN_ERR "microcode: ucode data file %s load failed\n",
|
|
|
|
+ name);
|
|
|
|
+ return error;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ buf_pos = buf = firmware->data;
|
|
|
|
+ size = firmware->size;
|
|
|
|
+
|
|
|
|
+ if (buf_pos[0] != UCODE_MAGIC) {
|
|
|
|
+ printk(KERN_ERR "microcode: error! Wrong microcode patch file magic\n");
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ offset = install_equiv_cpu_table(buf, buf_pos[2], offset);
|
|
|
|
+
|
|
|
|
+ if (!offset) {
|
|
|
|
+ printk(KERN_ERR "microcode: installing equivalent cpu table failed\n");
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ while ((offset =
|
|
|
|
+ get_next_ucode_from_buffer_amd(&mc, buf, size, offset)) > 0) {
|
|
|
|
+ error = get_matching_microcode_amd(mc, cpu);
|
|
|
|
+ if (error < 0)
|
|
|
|
+ break;
|
|
|
|
+ /*
|
|
|
|
+ * It's possible the data file has multiple matching ucode,
|
|
|
|
+ * lets keep searching till the latest version
|
|
|
|
+ */
|
|
|
|
+ if (error == 1) {
|
|
|
|
+ apply_microcode_amd(cpu);
|
|
|
|
+ error = 0;
|
|
|
|
+ }
|
|
|
|
+ vfree(mc);
|
|
|
|
+ }
|
|
|
|
+ if (offset > 0) {
|
|
|
|
+ vfree(mc);
|
|
|
|
+ vfree(equiv_cpu_table);
|
|
|
|
+ equiv_cpu_table = NULL;
|
|
|
|
+ }
|
|
|
|
+ if (offset < 0)
|
|
|
|
+ error = offset;
|
|
|
|
+ release_firmware(firmware);
|
|
|
|
+
|
|
|
|
+ return error;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static int apply_microcode_check_cpu_amd(int cpu)
|
|
|
|
+{
|
|
|
|
+ struct cpuinfo_x86 *c = &cpu_data(cpu);
|
|
|
|
+ struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
|
|
|
|
+ unsigned int rev;
|
|
|
|
+ cpumask_t old;
|
|
|
|
+ cpumask_of_cpu_ptr(newmask, cpu);
|
|
|
|
+ int err = 0;
|
|
|
|
+
|
|
|
|
+ /* Check if the microcode is available */
|
|
|
|
+ if (!uci->mc.mc_amd)
|
|
|
|
+ return 0;
|
|
|
|
+
|
|
|
|
+ old = current->cpus_allowed;
|
|
|
|
+ set_cpus_allowed(current, newmask);
|
|
|
|
+
|
|
|
|
+ /* Check if the microcode we have in memory matches the CPU */
|
|
|
|
+ if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 16)
|
|
|
|
+ err = -EINVAL;
|
|
|
|
+
|
|
|
|
+ if (!err) {
|
|
|
|
+ asm volatile("movl %1, %%ecx; rdmsr"
|
|
|
|
+ : "=a" (rev)
|
|
|
|
+ : "i" (0x0000008B) : "ecx");
|
|
|
|
+
|
|
|
|
+ if (uci->rev != rev)
|
|
|
|
+ err = -EINVAL;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ if (!err)
|
|
|
|
+ apply_microcode_amd(cpu);
|
|
|
|
+ else
|
|
|
|
+ printk(KERN_ERR "microcode: Could not apply microcode to CPU%d:"
|
|
|
|
+ " rev=0x%x\n",
|
|
|
|
+ cpu, uci->rev);
|
|
|
|
+
|
|
|
|
+ set_cpus_allowed(current, old);
|
|
|
|
+ return err;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static void microcode_fini_cpu_amd(int cpu)
|
|
|
|
+{
|
|
|
|
+ struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
|
|
|
|
+
|
|
|
|
+ mutex_lock(µcode_mutex);
|
|
|
|
+ uci->valid = 0;
|
|
|
|
+ vfree(uci->mc.mc_amd);
|
|
|
|
+ uci->mc.mc_amd = NULL;
|
|
|
|
+ mutex_unlock(µcode_mutex);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static struct microcode_ops microcode_amd_ops = {
|
|
|
|
+ .get_next_ucode = get_next_ucode_amd,
|
|
|
|
+ .get_matching_microcode = get_matching_microcode_amd,
|
|
|
|
+ .microcode_sanity_check = NULL,
|
|
|
|
+ .apply_microcode_check_cpu = apply_microcode_check_cpu_amd,
|
|
|
|
+ .cpu_request_microcode = cpu_request_microcode_amd,
|
|
|
|
+ .collect_cpu_info = collect_cpu_info_amd,
|
|
|
|
+ .apply_microcode = apply_microcode_amd,
|
|
|
|
+ .microcode_fini_cpu = microcode_fini_cpu_amd,
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static int __init microcode_amd_module_init(void)
|
|
|
|
+{
|
|
|
|
+ struct cpuinfo_x86 *c = &cpu_data(get_cpu());
|
|
|
|
+
|
|
|
|
+ equiv_cpu_table = NULL;
|
|
|
|
+ if (c->x86_vendor == X86_VENDOR_AMD)
|
|
|
|
+ return microcode_init(µcode_amd_ops, THIS_MODULE);
|
|
|
|
+ else
|
|
|
|
+ return -ENODEV;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static void __exit microcode_amd_module_exit(void)
|
|
|
|
+{
|
|
|
|
+ microcode_exit();
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+module_init(microcode_amd_module_init)
|
|
|
|
+module_exit(microcode_amd_module_exit)
|