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@@ -90,16 +90,6 @@
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#include <asm/io.h>
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-//#define OPTI621_MAX_PIO 3
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-/* In fact, I do not have any PIO 4 drive
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- * (address: 25 ns, data: 70 ns, recovery: 35 ns),
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- * but OPTi 82C621 is programmable and it can do (minimal values):
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- * on 40MHz PCI bus (pulse 25 ns):
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- * address: 25 ns, data: 25 ns, recovery: 50 ns;
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- * on 20MHz PCI bus (pulse 50 ns):
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- * address: 50 ns, data: 50 ns, recovery: 100 ns.
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- */
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-
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#define READ_REG 0 /* index of Read cycle timing register */
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#define WRITE_REG 1 /* index of Write cycle timing register */
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#define CNTRL_REG 3 /* index of Control register */
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@@ -150,13 +140,13 @@ static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio)
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u8 tim, misc, addr_pio = pio, clk;
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/* DRDY is default 2 (by OPTi Databook) */
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- static const u8 addr_timings[2][4] = {
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- { 0x20, 0x10, 0x00, 0x00 }, /* 33 MHz */
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- { 0x10, 0x10, 0x00, 0x00 }, /* 25 MHz */
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+ static const u8 addr_timings[2][5] = {
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+ { 0x20, 0x10, 0x00, 0x00, 0x00 }, /* 33 MHz */
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+ { 0x10, 0x10, 0x00, 0x00, 0x00 }, /* 25 MHz */
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};
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- static const u8 data_rec_timings[2][4] = {
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- { 0x5b, 0x45, 0x32, 0x21 }, /* 33 MHz */
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- { 0x48, 0x34, 0x21, 0x10 } /* 25 MHz */
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+ static const u8 data_rec_timings[2][5] = {
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+ { 0x5b, 0x45, 0x32, 0x21, 0x20 }, /* 33 MHz */
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+ { 0x48, 0x34, 0x21, 0x10, 0x10 } /* 25 MHz */
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};
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drive->drive_data = XFER_PIO_0 + pio;
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@@ -209,30 +199,22 @@ static const struct ide_port_ops opti621_port_ops = {
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.set_pio_mode = opti621_set_pio_mode,
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};
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-static const struct ide_port_info opti621_chipsets[] __devinitdata = {
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- { /* 0 */
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- .name = "OPTI621",
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- .enablebits = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} },
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- .port_ops = &opti621_port_ops,
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- .host_flags = IDE_HFLAG_NO_DMA,
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- .pio_mask = ATA_PIO3,
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- }, { /* 1 */
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- .name = "OPTI621X",
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- .enablebits = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} },
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- .port_ops = &opti621_port_ops,
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- .host_flags = IDE_HFLAG_NO_DMA,
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- .pio_mask = ATA_PIO3,
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- }
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+static const struct ide_port_info opti621_chipset __devinitdata = {
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+ .name = "OPTI621/X",
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+ .enablebits = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} },
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+ .port_ops = &opti621_port_ops,
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+ .host_flags = IDE_HFLAG_NO_DMA,
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+ .pio_mask = ATA_PIO4,
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};
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static int __devinit opti621_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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{
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- return ide_setup_pci_device(dev, &opti621_chipsets[id->driver_data]);
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+ return ide_setup_pci_device(dev, &opti621_chipset);
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}
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static const struct pci_device_id opti621_pci_tbl[] = {
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{ PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C621), 0 },
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- { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C825), 1 },
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+ { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C825), 0 },
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{ 0, },
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};
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MODULE_DEVICE_TABLE(pci, opti621_pci_tbl);
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